70 lines
2.2 KiB
ReStructuredText
70 lines
2.2 KiB
ReStructuredText
Quick Start
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===============================
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Requirements
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-------------------------------------------
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Using Linux is recommended.
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The provided scripts will not work on macOS out of the box, but they may be able to be modified to support it.
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Working under Windows is not recommended.
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* dtc (design-tree-compiler)
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* GNU awk
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* GNU sed
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* GNU make
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Setting up the Chipyard Repo
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-------------------------------------------
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Start by fetching Chipyard's sources. Run:
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.. code-block:: shell
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git clone https://github.com/ucb-bar/chipyard.git
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cd chipyard
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./scripts/init-submodules-no-riscv-tools.sh
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This will have initialized the git submodules.
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Installing the RISC-V Tools
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-------------------------------------------
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We need to install the RISC-V toolchain in order to be able to run RISC-V programs using the Chipyard infrastructure.
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This will take about 20-30 minutes. You can expedite the process by setting a ``make`` environment variable to use parallel cores: ``export MAKEFLAGS=-j8``.
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To build the toolchains, you should run:
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.. code-block:: shell
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./scripts/build-toolchains.sh
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.. Note:: If you are planning to use the Hwacha vector unit, or other RoCC-based accelerators, you should build the esp-tools toolchains by adding the ``esp-tools`` argument to the script above.
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If you are running on an Amazon Web Services EC2 instance, intending to use FireSim, you can also use the ``--ec2fast`` flag for an expedited installation of a pre-compiled toolchain.
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Finally, set up Chipyard's environment variables and put the newly built toolchain on your path:
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.. code-block:: shell
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source ./env.sh
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What's Next?
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-------------------------------------------
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This depends on what you are planning to do with Chipyard.
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* To learn about the structure of Chipyard, see :ref:`chipyard-components`.
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* To build one of the vanilla Chipyard examples, see :ref:`build-a-chip`.
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* To add a new accelerator, see :ref:`adding-an-accelerator`.
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* To run a simulation of one of the Chipyard examples, see :ref:`sw-rtl-sim-intro`.
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* To run a simulation of a custom Chipyard SoC Configuration, see <>.
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* To run a FPGA-accelerated simulation using FireSim, see :ref:`firesim-sim-intro`.
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* To run a VLSI flow using one of the vanilla Chipyard examples, see <>.
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