144 lines
6.1 KiB
Scala
144 lines
6.1 KiB
Scala
package example
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import chisel3._
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import freechips.rocketchip.config.{Config}
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// --------------
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// Rocket Configs
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// --------------
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class RocketConfig extends Config(
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new WithTop ++ // use default top
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new WithBootROM ++ // use default bootrom
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new freechips.rocketchip.subsystem.WithInclusiveCache ++ // use Sifive L2 cache
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++ // single rocket-core
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new freechips.rocketchip.system.BaseConfig) // "base" rocketchip system
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class HwachaRocketConfig extends Config(
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new WithTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new hwacha.DefaultHwachaConfig ++ // use Hwacha vector accelerator
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class RoccRocketConfig extends Config(
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new WithTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithRoccExample ++ // use example RoCC-based accelerator
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include start: JtagRocket
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class jtagRocketConfig extends Config(
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new WithDTMTop ++ // use top with dtm
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new freechips.rocketchip.subsystem.WithJtagDTM ++ // add jtag+DTM module to coreplex
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include end: JtagRocket
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// DOC include start: DmiRocket
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class dmiRocketConfig extends Config(
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new WithDTMTop ++ // use top with dtm
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include end: DmiRocket
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// DOC include start: PWMRocketConfig
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class PWMRocketConfig extends Config(
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new WithPWMTop ++ // use top with tilelink-controlled PWM
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include end: PWMRocketConfig
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class PWMAXI4RocketConfig extends Config(
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new WithPWMAXI4Top ++ // use top with axi4-controlled PWM
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class GCDRocketConfig extends Config( // add MMIO GCD module
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new WithGCDTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class SimBlockDeviceRocketConfig extends Config(
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new testchipip.WithBlockDevice ++ // add block-device module to peripherybus
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new WithSimBlockDeviceTop ++ // use top with block-device IOs and connect to simblockdevice
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class BlockDeviceModelRocketConfig extends Config(
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new testchipip.WithBlockDevice ++ // add block-device module to periphery bus
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new WithBlockDeviceModelTop ++ // use top with block-device IOs and connect to a blockdevicemodel
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include start: GPIORocketConfig
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class GPIORocketConfig extends Config(
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new WithGPIO ++ // add GPIOs to the peripherybus
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new WithGPIOTop ++ // use top with GPIOs
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include end: GPIORocketConfig
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class DualCoreRocketConfig extends Config(
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new WithTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(2) ++ // dual-core (2 RocketTiles)
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new freechips.rocketchip.system.BaseConfig)
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class RV32RocketConfig extends Config(
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new WithTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithRV32 ++ // set RocketTiles to be 32-bit
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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class GB1MemoryRocketConfig extends Config(
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new WithTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithExtMemSize((1<<30) * 1L) ++ // use 2GB simulated external memory
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include start: Sha3Rocket
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class Sha3RocketConfig extends Config(
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new WithTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new sha3.WithSha3Accel ++ // add SHA3 rocc accelerator
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include end: Sha3Rocket
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// DOC include start: InitZeroRocketConfig
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class InitZeroRocketConfig extends Config(
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new WithInitZero(0x88000000L, 0x1000L) ++
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new WithInitZeroTop ++
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new WithBootROM ++
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new freechips.rocketchip.subsystem.WithInclusiveCache ++
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new freechips.rocketchip.system.BaseConfig)
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// DOC include end: InitZeroRocketConfig
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