Colin Schmidt 0b1707c117 Filter out cc files and SimDRAM.v from hammer syn inputs ...

This should probably be handled in a more generic way.
I'm not sure why the SimDRAM stuff is showing up anywhere
but the harness file includes

2020-05-23 23:27:01 -07:00

..

extra_libraries/example

post-par sim, align dco straps

2019-10-04 00:27:44 -07:00

hammer @ d5b522ad1a

Also clean up new generated yamls. Bump hammer for new makefile

2020-05-23 20:29:50 -07:00

hammer-cadence-plugins @ cf2304c211

Respond to PR comments

2020-05-21 12:26:45 -07:00

hammer-mentor-plugins @ 33ccdccf2c

bump hammer, remove saed32

2019-09-19 22:50:14 -07:00

hammer-synopsys-plugins @ 451e072193

Respond to PR comments

2020-05-21 12:26:45 -07:00

.gitignore

Add initial VLSI flow scripts

2019-07-10 16:08:06 -07:00

env.yml

[skip ci] address comments, remove bwrc env vars, bump hammer

2019-09-26 15:40:22 -07:00

example-vlsi

post-par sim, align dco straps

2019-10-04 00:27:44 -07:00

example.v

[skip ci] address comments, instantiate Sha3Accel module

2019-09-27 09:37:27 -07:00

example.yml

[skip ci] address John's comments

2019-10-06 14:28:03 -07:00

Makefile

Filter out cc files and SimDRAM.v from hammer syn inputs

2020-05-23 23:27:01 -07:00

power.mk

Force power to depend on sim-par, bump hammer for saif trigger

2020-05-20 09:32:54 -07:00

sim.mk

Hide my sins

2020-03-20 16:30:32 -07:00

view_gds.py

add ability to view gds using gdspy

2019-10-06 22:57:13 -07:00