ROCKETCHIP_DIR=$(base_dir)/rocket-chip TESTCHIP_DIR = $(base_dir)/testchipip SCALA_VERSION=2.12.4 SCALA_VERSION_MAJOR=$(basename $(SCALA_VERSION)) SBT ?= java -Xmx2G -Xss8M -XX:MaxPermSize=256M -jar $(ROCKETCHIP_DIR)/sbt-launch.jar ++$(SCALA_VERSION) lookup_scala_srcs = $(shell find $(1)/ -iname "*.scala" 2> /dev/null) PACKAGES=rocket-chip testchipip barstools SCALA_SOURCES=$(foreach pkg,$(PACKAGES),$(call lookup_scala_srcs,$(base_dir)/$(pkg)/src/main/scala)) $(call lookup_scala_srcs,$(base_dir)/src/main/scala) ROCKET_CLASSES ?= "$(ROCKETCHIP_DIR)/target/scala-$(SCALA_VERSION_MAJOR)/classes:$(ROCKETCHIP_DIR)/chisel3/target/scala-$(SCALA_VERSION_MAJOR)/*" TESTCHIPIP_CLASSES ?= "$(TESTCHIP_DIR)/target/scala-$(SCALA_VERSION_MAJOR)/classes" FIRRTL_JAR ?= $(ROCKETCHIP_DIR)/lib/firrtl.jar $(FIRRTL_JAR): $(call lookup_scala_srcs, $(ROCKETCHIP_DIR)/firrtl/src/main/scala) $(MAKE) -C $(ROCKETCHIP_DIR)/firrtl SBT="$(SBT)" root_dir=$(ROCKETCHIP_DIR)/firrtl build-scala mkdir -p $(dir $@) cp -p $(ROCKETCHIP_DIR)/firrtl/utils/bin/firrtl.jar $@ touch $@ build_dir=$(sim_dir)/generated-src CHISEL_ARGS ?= ifneq ($(PROJECT),example) long_name=$(PROJECT).$(CONFIG) else long_name=$(PROJECT).$(MODEL).$(CONFIG) endif FIRRTL_FILE ?=$(build_dir)/$(long_name).fir ANNO_FILE ?=$(build_dir)/$(long_name).anno.json VERILOG_FILE ?=$(build_dir)/$(long_name).top.v TOP_FIR ?=$(build_dir)/$(long_name).top.fir TOP_ANNO ?=$(build_dir)/$(long_name).top.anno.json HARNESS_FILE ?=$(build_dir)/$(long_name).harness.v HARNESS_FIR ?=$(build_dir)/$(long_name).harness.fir HARNESS_ANNO ?=$(build_dir)/$(long_name).harness.anno.json HARNESS_SMEMS_FILE ?=$(build_dir)/$(long_name).harness.mems.v HARNESS_SMEMS_CONF ?=$(build_dir)/$(long_name).harness.mems.conf HARNESS_SMEMS_FIR ?=$(build_dir)/$(long_name).harness.mems.fir SMEMS_FILE ?=$(build_dir)/$(long_name).mems.v SMEMS_CONF ?=$(build_dir)/$(long_name).mems.conf SMEMS_FIR ?=$(build_dir)/$(long_name).mems.fir sim_dotf ?= $(build_dir)/sim_files.f sim_harness_blackboxes ?= $(build_dir)/firrtl_black_box_resource_files.harness.f sim_top_blackboxes ?= $(build_dir)/firrtl_black_box_resource_files.top.f REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(SMEMS_CONF) HARNESS_REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(HARNESS_SMEMS_CONF) $(sim_dotf): $(SCALA_SOURCES) $(FIRRTL_JAR) cd $(base_dir) && $(SBT) "runMain example.GenerateSimFiles -td $(build_dir) -sim $(sim_name)" $(FIRRTL_FILE) $(ANNO_FILE): $(SCALA_SOURCES) $(sim_dotf) mkdir -p $(build_dir) cd $(base_dir) && $(SBT) "runMain $(PROJECT).Generator $(CHISEL_ARGS) $(build_dir) $(PROJECT) $(MODEL) $(CFG_PROJECT) $(CONFIG)" $(VERILOG_FILE) $(SMEMS_CONF) $(TOP_ANNO) $(TOP_FIR) $(sim_top_blackboxes): $(FIRRTL_FILE) $(ANNO_FILE) cd $(base_dir) && $(SBT) "project tapeout" "runMain barstools.tapeout.transforms.GenerateTop -o $(VERILOG_FILE) -i $(FIRRTL_FILE) --syn-top $(TOP) --harness-top $(MODEL) -faf $(ANNO_FILE) -tsaof $(TOP_ANNO) -tsf $(TOP_FIR) $(REPL_SEQ_MEM) -td $(build_dir)" cp $(build_dir)/firrtl_black_box_resource_files.f $(sim_top_blackboxes) $(HARNESS_FILE) $(HARNESS_ANNO) $(HARNESS_FIR) $(sim_harness_blackboxes): $(FIRRTL_FILE) $(ANNO_FILE) $(sim_top_blackboxes) cd $(base_dir) && $(SBT) "project tapeout" "runMain barstools.tapeout.transforms.GenerateHarness -o $(HARNESS_FILE) -i $(FIRRTL_FILE) --syn-top $(TOP) --harness-top $(MODEL) -faf $(ANNO_FILE) -thaof $(HARNESS_ANNO) -thf $(HARNESS_FIR) $(HARNESS_REPL_SEQ_MEM) -td $(build_dir)" grep -v "SimSerial.cc\|SimDTM.cc\|SimJTAG.cc" $(build_dir)/firrtl_black_box_resource_files.f > $(sim_harness_blackboxes) # This file is for simulation only. VLSI flows should replace this file with one containing hard SRAMs MACROCOMPILER_MODE ?= --mode synflops $(SMEMS_FILE) $(SMEMS_FIR): $(SMEMS_CONF) cd $(base_dir) && $(SBT) "project barstools-macros" "runMain barstools.macros.MacroCompiler -n $(SMEMS_CONF) -v $(SMEMS_FILE) -f $(SMEMS_FIR) $(MACROCOMPILER_MODE)" HARNESS_MACROCOMPILER_MODE = --mode synflops $(HARNESS_SMEMS_FILE) $(HARNESS_SMEMS_FIR): $(HARNESS_SMEMS_CONF) cd $(base_dir) && $(SBT) "project barstools-macros" "runMain barstools.macros.MacroCompiler -n $(HARNESS_SMEMS_CONF) -v $(HARNESS_SMEMS_FILE) -f $(HARNESS_SMEMS_FIR) $(HARNESS_MACROCOMPILER_MODE)" regression-tests = \ rv64ud-v-fcvt \ rv64ud-p-fdiv \ rv64ud-v-fadd \ rv64uf-v-fadd \ rv64um-v-mul \ rv64mi-p-breakpoint \ rv64uc-v-rvc \ rv64ud-v-structural \ rv64si-p-wfi \ rv64um-v-divw \ rv64ua-v-lrsc \ rv64ui-v-fence_i \ rv64ud-v-fcvt_w \ rv64uf-v-fmin \ rv64ui-v-sb \ rv64ua-v-amomax_d \ rv64ud-v-move \ rv64ud-v-fclass \ rv64ua-v-amoand_d \ rv64ua-v-amoxor_d \ rv64si-p-sbreak \ rv64ud-v-fmadd \ rv64uf-v-ldst \ rv64um-v-mulh \ rv64si-p-dirty output_dir=$(sim_dir)/output $(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% mkdir -p $(output_dir) ln -sf $< $@