# Technology Setup
# Technology used is Sky130
vlsi.core.technology: "hammer.technology.sky130"

vlsi.core.max_threads: 12

# Technology paths
technology.sky130:
  sky130A: "/path/to/sky130A"
  openram_lib: "/path/to/sky130_sram_macros"

  # this key is OPTIONAL, no NDA files will be used if it does not point to a valid path
  sky130_nda: "/path/to/skywater-src-nda"

# General Hammer Inputs

# Hammer will auto-generate a CPF for simple power designs; see hammer/src/hammer-vlsi/defaults.yml for more info
vlsi.inputs.power_spec_mode: "auto"
vlsi.inputs.power_spec_type: "cpf"

# Specify clock signals
vlsi.inputs.clocks: [
  {name: "clock_clock", period: "10ns", uncertainty: "1ns"}
]

# Generate Make include to aid in flow
vlsi.core.build_system: make

# Placement Constraints
vlsi.inputs.placement_constraints:
  - path: "ChipTop"
    type: toplevel
    x: 0
    y: 0
    width: 3500
    height: 2500
    margins:
      left: 10
      right: 10
      top: 10
      bottom: 10

# Power Straps
par.power_straps_mode: generate
par.generate_power_straps_method: by_tracks
par.blockage_spacing: 40.0
par.blockage_spacing_top_layer: met4
par.generate_power_straps_options:
  by_tracks:
    strap_layers:
      - met4
      - met5
    pin_layers:
      - met5
    blockage_spacing_met2: 4.0
    blockage_spacing_met4: 2.0
    track_width: 3
    track_width_met5: 1
    track_spacing: 5
    track_start: 10
    track_start_met5: 1
    power_utilization: 0.1
    power_utilization_met4: 0.1
    power_utilization_met5: 0.1

# Pin placement constraints
vlsi.inputs.pin_mode: generated
vlsi.inputs.pin.generate_mode: semi_auto
vlsi.inputs.pin.assignments: [
  {pins: "*", layers: ["met2", "met4"], side: "bottom"}
]

# SRAM Compiler compiler options
vlsi.core.sram_generator_tool: "hammer.technology.sky130.sram_compiler"