wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 42 Packages Projects Releases Wiki Activity
1,090 Commits 8 Branches 0 Tags
fe2f50f8790036e5b6711f8a43f8fd873f01e048
Commit Graph
1090 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
Nathan Pemberton 6ca1715b47 Bump firemarshal to not initialize linux by default. This bumps the sha3 
generator to include the software workloads (moved from marshal). As a
result, the sha3 generator submodule is not initialized by default
(because it now has a copy of linux).
 2019-11-12 17:18:02 -05:00
Abraham GonzalezandGitHub ff2012699d Merge pull request #332 from ucb-bar/bump-barstools 
Bump Barstools
 2019-11-12 10:36:27 -08:00
Abraham GonzalezandGitHub 9ba7eeb8c3 Merge pull request #327 from ucb-bar/issue-pr-templates 
Issue + PR Templates
 2019-11-12 09:33:21 -08:00
abejgonzalez 77deedbfb8 bump firesim for midaexamples fix 2019-11-11 15:04:16 -08:00
abejgonzalez 542b165fd6 cleanup build script for ci | bump firesim 2019-11-11 11:13:14 -08:00
abejgonzalez d9b6b86b46 bump barstools 2019-11-07 13:43:59 -08:00
Abraham GonzalezandGitHub 9f720e0cbd Merge pull request #331 from ucb-bar/vlsi-makefile-cleanup 
Partition `vlsi/build` on design
 2019-11-06 22:42:13 -08:00
abejgonzalez 443be01495 remove notion of bwrc-env and remove from INPUT_CONFS [skip ci] 2019-11-06 13:48:24 -08:00
abejgonzalez 8439f1d5e1 re-add motivating example to feature request issue [skip ci] 2019-11-06 13:42:39 -08:00
abejgonzalez c39ba5713c split issue templates [skip ci] 2019-11-06 13:42:29 -08:00
Abraham Gonzalezandabejgonzalez abbd9ce905 templates for issues and prs [skip ci] 2019-11-06 13:42:29 -08:00
abejgonzalez d54a178f36 partition objdir 2019-11-06 11:18:08 -08:00
Abraham GonzalezandGitHub 5739c85c58 Merge pull request #326 from ucb-bar/main-workloads 
SPEC2017 + CoreMark + FireSim/FireMarshal Bump
 2019-11-06 09:19:25 -08:00
Abraham Gonzalez c8191b95de bump firesim 2019-11-05 07:06:17 +00:00
Abraham Gonzalez 4ce531c531 add coremark and spec firemarshal workloads 2019-11-05 07:04:07 +00:00
Abraham GonzalezandGitHub 36ec5172c4 Merge pull request #322 from ucb-bar/fix-grep-filter 
make sure grep filter only omits .h files
 2019-11-01 18:59:59 -07:00
David Biancolin e3b30dbd83 [FireChip] Use clock in BridgeBinders 2019-11-01 17:17:57 -07:00
Howard Mao bd6397130b make sure grep filter only omits .h files 2019-10-31 20:18:09 -07:00
Abraham GonzalezandGitHub b73e43a0f5 Merge pull request #318 from ucb-bar/abejgonzalez-patch-1 
Fix VLSI Makefile
 2019-10-25 14:04:30 -07:00
Abraham GonzalezandGitHub 69d3f9d499 Update vlsi/Makefile [skip ci] 2019-10-25 09:49:20 -07:00
Abraham GonzalezandGitHub 540fff55e2 Fix VLSI Makefile [skip ci] 
The `SMEMS_FILE` was supposed to be `TOP_SMEMS_FILE`
 2019-10-25 09:47:22 -07:00
Colin SchmidtandGitHub b934c51315 Add phony firrtl target to just build firrtl file (#317) 2019-10-24 10:26:45 -07:00
Howard Mao e859fb1779 make sure blackbox resource files always created 2019-10-21 09:55:40 -07:00
Howard Mao 05af2f9a9c Fix tracegen target and add to CI 2019-10-21 09:55:40 -07:00
Abraham GonzalezandGitHub ced4d2eea0 Merge pull request #314 from ucb-bar/master 
`master` fixes into `dev`
 2019-10-18 21:05:29 -04:00
Abraham GonzalezandGitHub 2f3ac85c2a Merge pull request #315 from ucb-bar/hwacha-boom 
add large boom hwacha config
 2019-10-18 19:22:30 -04:00
abejgonzalez 929110f562 add large boom hwacha config 2019-10-18 16:18:16 -07:00
Albert MagyarGitHubAbraham Gonzalez
 		0d5bcf9c0d Add FireChip target with Verilog blackbox (#297) 
Co-Authored-By: Abraham Gonzalez <abe.j.gonza@gmail.com>
 2019-10-16 14:31:58 -07:00
harrisonliewandGitHub 701129fb62 [docs][ci skip] Remove extra backticks in docs (#312) 
Closes #299
 2019-10-16 10:43:55 -07:00
Colin Schmidt b0b6466c22 handle asap7 lack of memories in makefile 2019-10-16 10:32:56 -07:00
Colin Schmidt 784bff2666 [docs][ci skip] Remove extra backticks in docs 
Also fix sram-cache error. Fixes #299
 2019-10-16 08:40:20 -07:00
Abraham GonzalezandGitHub 61ca6fa294 Merge pull request #307 from ucb-bar/fix-ci 
Fix `master` CI
 2019-10-16 08:06:37 -04:00
abejgonzalez c87b69fcbf fix spacing in init-submodules-no-riscv-tools.sh 2019-10-15 21:14:27 -07:00
Abraham GonzalezandGitHub c308985ae2 Merge pull request #308 from ucb-bar/log-tests 
Log tests
 2019-10-16 00:05:18 -04:00
abejgonzalez f0fa623000 also check firesim 2019-10-15 10:31:09 -07:00
abejgonzalez 2c4783bfe9 remove *.out file for fast sims 2019-10-15 07:23:37 -07:00
abejgonzalez 8f2c5d4796 add *.log files whenever a binary is run 2019-10-14 20:55:40 -07:00
Abraham GonzalezandGitHub eee48dc2a1 Merge pull request #304 from ucb-bar/new-env 
Add a specific toolchain `env.sh`
 2019-10-14 21:14:29 -04:00
abejgonzalez 7e908b4964 update ci to exit at the end instead of partway through | fix flattened toolchain repos 2019-10-14 13:27:58 -07:00
Abraham GonzalezandGitHub b004ecc8bf Merge pull request #284 from ucb-bar/add-hwacha-tests 
Check and add Hwacha tests
 2019-10-14 13:43:24 -04:00
Abraham GonzalezandGitHub 7150f509b7 Merge pull request #305 from ucb-bar/master 
Get `master` CI fix
 2019-10-14 13:37:33 -04:00
abejgonzalez 112fe43f60 add -f flag 2019-10-14 10:36:15 -07:00
David Biancolin 84611fed8a [CI] Completely remove the clockdiv tests 2019-10-13 15:22:49 -07:00
David Biancolin 46289ec284 Bump FireSim 2019-10-13 14:20:23 -04:00
David Biancolin 2e5f29031e [CI] Remove clock-division based FC tests 2019-10-13 14:08:48 -04:00
David Biancolin 8c28f03ba1 [FireChip] Remove by3 clock division FASED config 2019-10-13 14:08:10 -04:00
Abraham GonzalezandGitHub abe5262ae7 Merge pull request #302 from ucb-bar/ci-fix 
(master) Fix commit on master CI check
 2019-10-13 08:54:31 -07:00
abejgonzalez 8af172c313 update ci to use example generator 2019-10-13 08:43:52 -07:00
Abraham GonzalezandGitHub 9babeb9743 Remove BuildRoCC param 2019-10-13 08:41:21 -07:00
abejgonzalez d6bcf2870f cleaner test for hwacha param 2019-10-13 08:37:38 -07:00