alonamid
46ea900538
Merge pull request #695 from ucb-bar/shared-configs
...
Have FireSim build recipes use Chipyard configs rather than FireChip configs
2020-10-16 14:28:35 -07:00
Alon Amid
8de7aa8d69
bump firesim
2020-10-16 18:18:35 +00:00
Alon Amid
6eaac63e1b
address PR comments
2020-10-16 06:34:26 +00:00
David Biancolin
f3e1cb434d
Merge pull request #696 from ucb-bar/no-default-core-fame-models
...
Don't annotate cores with FAMEModelAnnotations
2020-10-15 18:03:27 -04:00
Albert Magyar
84e0bf7338
Don't annotate cores with FAMEModelAnnotations
2020-10-15 12:25:39 -07:00
abejgonzalez
9ba4918cb8
Inject MMCDevice into TLSPI Node
2020-10-15 11:46:42 -07:00
David Biancolin
b747116363
Bump FireSim
2020-10-15 11:28:44 -07:00
David Biancolin
74c1c9d7ab
Punch out reset in AXI4MMIO IOBinder
2020-10-15 11:28:36 -07:00
Alon Amid
fd4a70dfb6
docs typos
2020-10-15 18:04:31 +00:00
Alon Amid
6479d54f53
bump firesim
2020-10-15 17:53:25 +00:00
Alon Amid
c7a197d79a
docs
2020-10-15 17:51:28 +00:00
Alon Amid
20d3b9f9ce
bump firesim
2020-10-15 17:08:06 +00:00
Alon Amid
2c935b4ad7
pull firesim mem model config into firesim tweaks
2020-10-15 17:07:51 +00:00
Alon Amid
4a317b0cab
differentiate default config package delimiter
2020-10-15 17:07:20 +00:00
abejgonzalez
7f387a254b
Working up until the MMC attachment
2020-10-14 23:09:49 -07:00
abejgonzalez
dcac9b79df
Basic working with UART
2020-10-14 16:15:10 -07:00
David Biancolin
9c8d2948af
[firechip] Fix a broken config
2020-10-14 15:33:32 -07:00
David Biancolin
6aefb73ab5
Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing
2020-10-14 15:29:00 -07:00
abejgonzalez
949d60597f
Revert "Support evaluation of HarnessBinders in LazyModule context"
...
This reverts commit 9c298eedfe
2020-10-14 14:50:38 -07:00
abejgonzalez
dda7622c29
temp commit
2020-10-14 14:49:22 -07:00
David Biancolin
5f488bc068
Bump FireSim for multiclock FAME1 xform fix
2020-10-14 14:44:48 -07:00
David Biancolin
211c33f996
Address comments in #690
2020-10-14 14:42:45 -07:00
abejgonzalez
341a6cc48d
Merge remote-tracking branch 'origin/lazy-harnessbinders' into local-fpga-temp
2020-10-13 16:23:41 -07:00
abejgonzalez
5bbd865447
Add MMC Device section to the DTS
2020-10-13 16:18:00 -07:00
Jerry Zhao
9c298eedfe
Support evaluation of HarnessBinders in LazyModule context
2020-10-13 15:10:41 -07:00
abejgonzalez
8257775e96
Connect DDR from harness
2020-10-12 21:50:50 -07:00
Jerry Zhao
d958b8e1aa
[ci skip] Update smartelf2hex to use MemSiz instead of FileSiz
...
elf2hex writes zeros to a segment for which MemSize > FileSize, which adheres to the ELF spec.
Thus, we should calculate the total size of the file from the MemSize of the last segment, rather than the FileSize.
2020-10-12 17:48:08 -07:00
Jerry Zhao
8f86b6d19a
Merge pull request #683 from ucb-bar/unify-fesvr
...
Unify htif implementation with firesim
2020-10-12 11:17:23 -07:00
Nathan Pemberton
64632c8aee
Merge pull request #686 from eddygta17/master
...
added gettext dependency for qemu build
2020-10-12 10:50:35 -07:00
James Dunn
895dcd6831
referencing fully qualified chipyard.harness.OverrideHarnessBinder to debug import issue.
2020-10-11 11:12:33 -07:00
James Dunn
dca56cd858
Removing redefinitions of HasHarnessSignalReferences and HasTestHarnessFunctions in TestHarness.scala.
2020-10-10 19:55:02 -07:00
James Dunn
54acfe71fc
Some HarnessBinder testing with Jerry's debug suggestions.
2020-10-10 13:45:27 -07:00
dunn
7d1a1539e6
Initial pass at HarnessBinders for Arty.
2020-10-09 23:17:36 -07:00
Jerry Zhao
0c46ed1676
Rename testchip_fesvr to testchip_tsi
2020-10-09 09:34:20 -07:00
Jerry Zhao
25129c27ca
Add testchip_fesvr to uncondtionally used resources
2020-10-09 09:27:58 -07:00
Jerry Zhao
d71c3b6357
Unify htif implementation with firesim
2020-10-09 09:27:58 -07:00
David Biancolin
986b5831c8
[clocking] Sketch out a topology that puts the MBUS is a separate domain
2020-10-09 07:23:17 -07:00
David Biancolin
30b278687b
[clocking] Also aggregate clocks in AsyncClockGroup
2020-10-09 07:13:55 -07:00
Jerry Zhao
b583276d1e
Merge pull request #682 from ucb-bar/clocking-features
...
Add tile-reset control registers | multiclock fixes
2020-10-08 14:39:53 -07:00
Nathan Pemberton
bf8dbaa297
Merge pull request #689 from ucb-bar/bumpMarshal1.10
...
Bump firemarshal to v1.10.0
2020-10-08 11:07:23 -07:00
Nathan Pemberton
399b909dec
Bump firemarshal to v1.10.0
2020-10-07 20:50:26 -04:00
dunn
252f9c6a12
Beginning to modify Arty TestHarness to conform with HarnessBinders. Currently does not compile; debugging.
2020-10-07 11:55:16 -07:00
Amirali Sharifian
ce13ee920d
Update Gemmini.rst
...
The gemmini config file's name is been updated from `configs.scala` to `Configs.scala`
2020-10-07 11:38:41 -07:00
David Biancolin
392d5b0801
[clocking] Synchronize all output clocks from DividerOnly generator
2020-10-07 09:32:48 -07:00
dunn
a67318928a
Bumping submodules to upstream dev's commits.
2020-10-07 09:02:30 -07:00
Zitao Fang
5282965b5b
Filter specified HTIF arguments and plusargs only
2020-10-06 15:50:11 -07:00
dunn
309b9ee7ae
Merge remote-tracking branch 'upstream/dev' into local-fpga-arty-abe
2020-10-06 12:23:18 -07:00
dunn
9664b848e9
Pointing common.mk's SOURCE_DIR to subdirectories of fpga, to avoid circular dependency caused by pointing to fpga, which contains generated-src.
2020-10-06 11:20:27 -07:00
Zitao Fang
355e4ba606
Change to filter all arguments that begin with a '-'
2020-10-05 10:49:04 -07:00
James Dunn
afc085a5f4
Removed AON block from E300 design. Debug over JTAG still functioning.
2020-10-04 18:13:47 -07:00
