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Author SHA1 Message Date
Jerry Zhao
57ee757016 Remove MultiClockHarnessAXIMem 
Previously, the MultiClockHarnessAXIMem stuff attached SimDRAM over the serial-tl link.
This was done to enable test-chip-like simulations, where the HarnessBinder/BridgeBinder
would effectively implement a similar system as what would go on the bringup platform.

Now that multi-chip-tops are supported, and co-simulation of the ChipTop and the BringupTop
are supported, we can remove all this old Harness-level stuff to reduce duplication
 2023-09-16 09:47:47 -07:00
Abraham Gonzalez
174ebc50b7 Merge pull request #1598 from ucb-bar/remove-dromajo 
Remove Dromajo
 2023-09-10 16:13:14 -07:00
abejgonzalez
dafd7be273 Bump docs 2023-09-08 15:32:01 -07:00
abejgonzalez
6fab524b20 Bump 2023-09-08 15:13:52 -07:00
abejgonzalez
df598c6b80 Run all CI locally 2023-09-08 15:07:32 -07:00
abejgonzalez
284f276fbb Remove Dromajo + documentation 2023-09-08 14:28:10 -07:00
Jerry Zhao
12248a221c Merge pull request #1597 from ucb-bar/jerryz123-patch-2 
Fix VCU118 freq adjustment configs
 2023-09-06 20:11:43 -07:00
Jerry Zhao
0b81a82459 Fix VCU118 freq adjustment configs 
Resolves #1583
 2023-09-06 10:55:53 -07:00
Abraham Gonzalez
48dcce2204 Merge pull request #1588 from ucb-bar/cospike-integration 
Replace Dromajo FireSim bridge with Cospike
 2023-09-05 11:58:07 -07:00
Jerry Zhao
e148a32e6b Merge pull request #1514 from ucb-bar/klayout-docs 
KLayout section of Sky130+OpenROAD tutorial
 2023-09-05 11:41:09 -07:00
Jerry Zhao
bc10cdac35 Merge pull request #1595 from ucb-bar/bump-sifive-cache 
bump sifive cache
 2023-09-05 09:48:28 -07:00
Jerry Zhao
8c55fef690 Merge pull request #1584 from ucb-bar/jerryz123-patch-1 
Clarify fragments in ChipLikeRocketConfigs.scala
 2023-09-04 15:33:00 -07:00
joey0320
2c6a1c6580 bump sifive cache 2023-09-04 14:54:50 -07:00
abejgonzalez
5541582639 Bump Boom 2023-09-04 12:23:07 -07:00
abejgonzalez
3c42e63732 Bump FireSim 2023-08-30 22:17:17 -07:00
abejgonzalez
8044b26dfe Bump testchipip 2023-08-30 22:16:08 -07:00
abejgonzalez
44f042a152 Merge remote-tracking branch 'origin/main' into cospike-integration 2023-08-30 18:06:31 -07:00
abejgonzalez
d54007ea25 Bump FireSim 2023-08-30 17:57:23 -07:00
abejgonzalez
a48746f113 Deprecate Dromajo in FireSim, use cospike 
Move Cospike to testchipip
 2023-08-30 17:55:04 -07:00
Abraham Gonzalez
074c995a31 Merge pull request #1587 from ucb-bar/abejgonzalez-patch-1 
Remove pre-commit from env.sh
 2023-08-30 13:50:44 -07:00
Abraham Gonzalez
4cfc16674c Remove pre-commit from env.sh 2023-08-30 11:39:13 -07:00
Nayiri K
70acacff28 removed VLSI PnR part of CI flow 2023-08-30 10:54:25 -07:00
Abraham Gonzalez
49b51ba40a Merge pull request #1585 from ucb-bar/enable-precommit 
Enable precommit | Format files
 2023-08-30 10:54:14 -07:00
abejgonzalez
c7f1fe220d Enable precommit | Format files 2023-08-28 14:56:55 -07:00
Jerry Zhao
00cd8575ca Clarify fragments in ChipLikeRocketConfigs.scala 2023-08-26 16:57:53 -07:00
Jerry Zhao
7440f561d0 Merge pull request #1572 from JL102/wsl 
Documentation: Change "don't use Windows" to "if using Windows, use WSL"
 2023-08-23 15:29:38 -07:00
Jerry Zhao
fae344e1c1 Merge pull request #1580 from ucb-bar/vcospike 
Support variable VLEN cosim
 2023-08-22 17:51:03 -07:00
Jerry Zhao
886b6701a8 Support variable VLEN cosim 2023-08-22 14:55:05 -07:00
Jerry Zhao
68b7c0759a Merge pull request #1577 from ucb-bar/bumprc 
Bump to latest rocket-chip | integrated fixed-point | pull in stage/phase
 2023-08-22 14:51:26 -07:00
Jerry Zhao
5495d05aa0 Bump to latest rocket-chip 2023-08-22 11:28:57 -07:00
Jerry Zhao
a4382e650e Merge pull request #1578 from ucb-bar/periphery-docs 
Improve: SiFive peripheral device doumentation
 2023-08-21 15:55:54 -07:00
-T.K.-
f352ef46f4 ADD: minor fix on GPIO and UART description 2023-08-21 15:33:07 -07:00
-T.K.-
2f7219d41b ADD: add SPI documentation 2023-08-21 15:27:09 -07:00
-T.K.-
5b561c2d68 ADD: add docs for peripheral devices 2023-08-21 15:21:55 -07:00
Jerry Zhao
ed96a11a26 Merge pull request #1576 from ucb-bar/rocket-async 
Fix asyncqueue depth in ChipLikeRocketConfig
 2023-08-16 10:09:57 -07:00
Jerry Zhao
c9ed05057b Merge pull request #1575 from ucb-bar/bumpspike 
Bump spike to latest
 2023-08-15 17:02:07 -07:00
Jerry Zhao
1c80ddd40a Merge pull request #1574 from ucb-bar/testchipip-bump 
bump testchipip
 2023-08-15 15:29:52 -07:00
Jerry Zhao
453903dbc7 Fix asyncqueue depth in ChipLikeRocketConfig 2023-08-15 15:29:04 -07:00
Jerry Zhao
1655b12939 Bump spike to latest 2023-08-15 13:42:49 -07:00
joey0320
2b66c89769 bump testchipip 2023-08-15 11:49:18 -07:00
Jordan Lees
58b9730dc7 change 'don't use Windows' to 'if using Windows, use WSL' 2023-08-03 15:19:07 -07:00
Jerry Zhao
c745cbc064 Merge pull request #1567 from ucb-bar/rcbump 
Bump rocket-chip
 2023-07-31 16:34:46 -07:00
Jerry Zhao
11c8137627 Merge pull request #1569 from ucb-bar/bumps 
Bump testchipip/barstools
 2023-07-31 15:15:53 -07:00
Jerry Zhao
887c1c9bb1 Merge pull request #133 from ucb-bar/fixes 
Fixes for IOCell + MacroCompiler
 2023-07-31 14:12:55 -07:00
Jerry Zhao
57325448d3 Bump boom 2023-07-31 11:51:50 -07:00
Jerry Zhao
0b097d681e Bump firesim 2023-07-31 10:59:51 -07:00
Jerry Zhao
65ed3c162c Bump testchipip/barstools 2023-07-31 10:15:56 -07:00
Jerry Zhao
f5fe37c4bf Delete IOCell.v 2023-07-31 09:52:15 -07:00
Jerry Zhao
c8723f40b1 Macrocompiler: FIRRTL-elab macros 1-at-a-time 
Elaborating all macros in a single Circuit with an arbitrary (last) macro
selected as the circuit main main cause some macros to be dropped, even with
the DCEAnnotation. Work around this for now by elaborating each module in the
macrocompiled circuit independently, then concatenating the verilog.
 2023-07-30 13:33:23 -07:00
Jerry Zhao
368dde4a35 Generate 1 file per generic IOCell 2023-07-30 13:12:55 -07:00