JL102
a7993db08e
I think now I put &&s everywhere that is necessary
2023-10-06 19:00:11 -04:00
JL102
aded25fee0
Made indentation consistent
2023-10-06 18:49:10 -04:00
JL102
b76ab6b5b0
Replaced "try-catch" with a more special-purpose set of functions
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This also fixed the weird issue I was experiencing where the try-catch in step 1 caused step 3 to break
2023-10-06 18:43:52 -04:00
Hansung Kim
4f83f1cde6
Rename SUB_PROJECT to coalescer
2023-10-06 13:36:27 -07:00
joonho hwangbo and GitHub
a524adb1b9
Fix icenet-loopback clock and reset domain ( #1612 )
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* Fix
* Bump icenet
* revert icenet bump | fix harnessbinders
2023-10-06 08:34:15 -07:00
Jerry Zhao
e6203bb25c
Fix fsim supernode memmodel
2023-10-05 23:56:29 -07:00
Jerry Zhao
8fb4ba5675
Fix UARTPort freqMHz
2023-10-05 21:03:34 -07:00
Jerry Zhao
eb3a0aecf4
Add PortAPI between IO and Harness blocks
2023-10-05 15:02:56 -07:00
Hansung Kim
e2cdb5e523
Keep bootrom.rv32.img
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Otherwise breaks ci for ibex.
2023-10-05 14:26:35 -07:00
Hansung Kim
53cacef312
Revert "[ci] Fix commit-on-master-check to find rocket-chip on graphics"
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Just disable this job in ci-gpu.
2023-10-05 14:25:34 -07:00
Hansung Kim
b15765184e
[ci] Trim down chipyard-ci-gpu
2023-10-05 14:24:34 -07:00
Vladimir Milovanović and pznikola
3d96cf5bc9
Adds initial Nexys Video board support.
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Co-authored-by: pznikola <p.z.nikola@etf.rs >
2023-10-05 23:01:29 +02:00
Vladimir Milovanović
7debb5f52d
Bump fpga-shells.
2023-10-06 09:54:42 +02:00
Vladimir Milovanović
3c9818024b
Bump rocket-dsp-utils.
2023-10-06 09:54:42 +02:00
Vladimir Milovanović
9a9e201507
Bump fixedpoint.
2023-10-06 09:54:42 +02:00
Vladimir Milovanović
6eacd0aa75
Bump dsptools.
2023-10-06 09:54:42 +02:00
Jerry Zhao and GitHub
6b5d55ccd4
Merge pull request #1615 from hansungk/fix-insert-includes-python
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Make scripts/insert-includes.py use Python from conda env
2023-10-05 11:36:06 -07:00
Hansung Kim
3f16019e41
Merge remote-tracking branch 'origin/fix-insert-includes-python' into graphics
2023-10-05 11:24:02 -07:00
Hansung Kim
921b0c062e
Use env python interpreter in insert-includes.py
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This fixes failing CI for CVA6/nvdla on a system that does not have a
/usr/bin/python interpreter by making the script use one from conda env.
2023-10-05 11:15:42 -07:00
Hansung Kim
875158a60f
[ci] Remove debug lines added in create-conda-env
2023-10-05 11:09:13 -07:00
Jordan Lees and GitHub
3b7057cbfc
Merge branch 'ucb-bar:main' into script-trycatch
2023-10-04 23:34:19 -07:00
JL102
6b70dd6d39
Added "try-catch" to all build-setup steps
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This was the only way I knew how to display the step at which the build-setup process failed.
I've personally experienced failures at multiple of the build steps, and before I got used to Chipyard,
it was hard to figure out which step was the culprit. With this, users should have a bit more info to
troubleshoot their issues. For some of the build steps that required multiple lines, I figured it made
more sense to put them into a sub-script, rather than putting a && at the end of each line. But for the
firesim one for example, since it was two .sh calls, I just put a && after the first one, inside of the
try block, to make sure both lines run.
2023-10-05 02:17:25 -04:00
Hansung Kim
debdd35b13
[ci] Fix commit-on-master-check to find rocket-chip on graphics
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... and remove prepare-chipyard-fpga.
2023-10-04 20:31:39 -07:00
Hansung Kim
24433584ae
[ci] Disable FPGA tests
2023-10-04 20:02:14 -07:00
Hansung Kim
cac5c57b7d
[ci] Attempt 2
2023-10-04 18:29:28 -07:00
Hansung Kim
994e46f7c4
[ci] Attempt to fix conda init
2023-10-04 18:24:03 -07:00
Hansung Kim
e67537d689
[ci] Resurrect create-conda-env, change all to self-hosted
2023-10-04 17:23:50 -07:00
Hansung Kim
7a65813259
[ci] Create ci-gpu for every push on graphics
2023-10-04 16:52:27 -07:00
Hansung Kim
d6be26ed42
[ci] Revert running ci-process on every push
2023-10-04 16:52:02 -07:00
Hansung Kim
2598a96187
[ci] Run ci-process on every push to graphics
2023-10-04 16:41:17 -07:00
Hansung Kim
ffe1b74e67
Add gen-collateral to Verilator include dir
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This fixes VX_define.vh not being found when compiling Vortex verilog
sources.
2023-10-01 19:37:31 -07:00
Hansung Kim
3d7caa41e8
Merge remote-tracking branch 'upstream/main' into graphics
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Bumped rocket-chip and testchipip to graphics
2023-10-01 17:57:36 -07:00
joshua
12e66e76c5
bump rocket + update VortexCache config
2023-09-29 00:54:55 -07:00
joshua
0de6ec7c0f
Merge remote-tracking branch 'origin/graphics' into graphics
2023-09-28 11:39:03 -07:00
Hansung Kim
d801e12d3d
Change bootrom path for GPU
2023-09-27 14:37:46 -07:00
-T.K.-
8fa8be5669
ADD: bump testchipip
2023-09-27 10:54:57 -07:00
Richard Yan
50277f3209
bump rocket-chip and testchipip
2023-09-27 10:54:26 -07:00
Jerry Zhao and GitHub
adebd634b4
Fix Arty100T Verilog build ( #1608 )
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* Bump rocket-chip
* Bump fpga-shells
* Add Arty100T Verilog build to CI
* Fix Arty100T harness disconnected LEDs
2023-09-27 13:03:37 +02:00
Richard Yan
ec63986310
fix testchipip
2023-09-26 16:16:05 -07:00
joshua
52c79e4b15
Merge remote-tracking branch 'origin/graphics' into graphics
2023-09-25 23:44:23 -07:00
joshua
477e88f95b
new rocketconfig for vx_cache
2023-09-25 23:44:12 -07:00
Richard Yan
8a2aa54a1c
add operand roms, point testchipip to fork, bump rocket
2023-09-25 21:29:25 -07:00
-T.K.-
f3c7ecf8ba
REFACTOR: change bootaddr and reset vector address
2023-09-23 19:17:54 -07:00
Jerry Zhao and GitHub
8c1319073c
Merge pull request #1601 from ucb-bar/no-mcaxiram
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Remove MultiClockHarnessAXIMem
2023-09-20 21:26:40 -07:00
Jerry Zhao and GitHub
8c3a586c73
Add NarrowRocketCache config fragment
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For configs with wide SBUS, a narrow rocket cache is easier to PD, and does not incur any performance loss usually
2023-09-20 15:53:13 -07:00
Jerry Zhao
7106200d9d
Fix HarnessClockInstantiatorEx doc reference
2023-09-20 11:46:42 -07:00
Jerry Zhao
9ab5067e35
Update docs on bringup sims
2023-09-20 11:44:43 -07:00
Jerry Zhao and GitHub
0fd04c302f
Merge pull request #1602 from ucb-bar/mihai-temp
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Updated docs on waveform generation to match current workflow.
2023-09-17 10:34:02 -07:00
Jerry Zhao and GitHub
affbdc254b
Update docs/Simulation/Software-RTL-Simulation.rst
2023-09-17 10:33:42 -07:00
Mihai Tudor
0de940b6a0
Updated docs on waveform generation
2023-09-16 19:48:59 -07:00
JL102