wu-arch/chipyard
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46e2ecb9ae79f32ea864a3de5648586dab794434
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2 Commits

Author SHA1 Message Date
Colin Schmidt
c23b2b6f84 SRAM depth to bigint 
max synflop depth support
Fix annotation mangling on the harness side
 2019-05-14 10:10:47 -07:00
Edward Wang
94b13e96fb Add functional tests 
To be enabled when a new firrtl-interpreter is published
 2017-10-03 11:56:30 -07:00