Commit Graph

17 Commits

Author SHA1 Message Date
Jerry Zhao
d51a9a74d3 Merge remote-tracking branch 'origin/main' into clusters 2024-01-09 13:30:26 -08:00
Jerry Zhao
604cb6358f Bump fpga-platforms to new organized testchipip 2023-12-19 12:33:37 -08:00
Jerry Zhao
b4d4e54f9c Bump fpga-shells 2023-10-24 18:24:44 -07:00
Jerry Zhao
607c2b5a73 Unify multi-node btw chipyard/firechip | unify harness clocking 2023-05-12 08:41:34 -07:00
Jerry Zhao
df2e5ad9dc Bump to latest rocket-chip/chisel3.5.6 2023-03-28 16:48:27 -07:00
abejgonzalez
4d3ff26a73 Bump testchipip 2021-01-04 15:36:00 -08:00
abejgonzalez
7ca3be236c Bump bringup VCU118 | Ignore HTIF if no-debug module 2020-11-12 11:47:16 -08:00
abejgonzalez
244205e2b4 Separate new sys_clk and ddr2 from TSI 2020-11-08 17:49:32 -08:00
abejgonzalez
c5e8fecb5c Small renaming and cleanup 2020-11-06 21:00:18 -08:00
abejgonzalez
7baa1341ee Use 2nd system clock for TSI DDR | Small cleanups 2020-11-06 16:34:45 -08:00
abejgonzalez
6aae66c54f Add TSI Host Widget 2020-11-06 15:50:28 -08:00
abejgonzalez
9a5b67bf8c Use Chipyard configs as a base (VCU118) 2020-11-05 20:30:49 -08:00
Abraham Gonzalez
0eca51ba4d Reorganize into bringup/simple | Bump sifive-blocks 2020-10-27 12:57:34 -07:00
Abraham Gonzalez
3c42e2cae7 Fixed BootROM | Updated HarnessBinders 2020-10-26 18:15:58 -07:00
Abraham Gonzalez
db73cab164 Add BootROM | Fix ResetWrangler for DDR | Add scripts 2020-10-20 21:20:11 -07:00
Abraham Gonzalez
dd358f45ab UART Working... Bumped to newer fpga-shells 2020-10-19 11:29:25 -07:00
abejgonzalez
7f387a254b Working up until the MMC attachment 2020-10-14 23:09:49 -07:00