Bump testchipip
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@@ -447,18 +447,6 @@ chipyard_simif_t::chipyard_simif_t(size_t icache_ways,
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use_stq(false),
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htif(nullptr),
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fast_clint(false),
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cfg(std::make_pair(0, 0),
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nullptr,
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isastr,
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"MSU",
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"vlen:128,elen:64",
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false,
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endianness_little,
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pmpregions,
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std::vector<mem_cfg_t>(),
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std::vector<size_t>(),
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false,
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0),
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accessed_tofrom_host(false),
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icache_ways(icache_ways),
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icache_sets(icache_sets),
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@@ -470,6 +458,19 @@ chipyard_simif_t::chipyard_simif_t(size_t icache_ways,
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mmio_inflight(false)
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{
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cfg.initrd_bounds = std::make_pair(0, 0);
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cfg.bootargs = nullptr;
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cfg.isa = isastr;
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cfg.priv = "MSU";
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cfg.varch = "vlen:128,elen:64";
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cfg.misaligned = false;
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cfg.endianness = endianness_little;
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cfg.pmpregions = pmpregions;
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cfg.mem_layout = std::vector<mem_cfg_t>();
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cfg.hartids = std::vector<size_t>();
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cfg.explicit_hartids = false;
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cfg.trigger_count = 0;
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icache.resize(icache_ways);
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for (auto &w : icache) {
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w.resize(icache_sets);
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Submodule generators/testchipip updated: e1bed32643...50a05b0782
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