From fd6d3272e424a0c1740526bc4c41919bf77dd46c Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Fri, 20 Sep 2019 17:58:48 -0700 Subject: [PATCH] add quotes around core/tile [skip ci] --- docs/Customization/Heterogeneous-SoCs.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/Customization/Heterogeneous-SoCs.rst b/docs/Customization/Heterogeneous-SoCs.rst index 6e46bb31..116d4ae9 100644 --- a/docs/Customization/Heterogeneous-SoCs.rst +++ b/docs/Customization/Heterogeneous-SoCs.rst @@ -99,5 +99,5 @@ If this is used earlier in the configuration sequence, then MultiRoCC does not w This mixin can be changed to put more accelerators on more cores by changing the arguments to cover more ``hartId``'s (i.e. ``WithMultiRoCCHwacha(0,1,3,6,...)``). -.. [1] Note, in this section core and tile are used interchangeably but there is subtle distinction between a core and tile (tile contains a core, L1D/I$, PTW). - For many places in the documentation, we usually use core to mean tile (doesn't make a large difference but worth the mention). +.. [1] Note, in this section "core" and "tile" are used interchangeably but there is subtle distinction between a "core" and "tile" ("tile" contains a "core", L1D/I$, PTW). + For many places in the documentation, we usually use "core" to mean "tile" (doesn't make a large difference but worth the mention).