From fae57b6daa05cec4cd5ce107ee9ba87b1be8b94b Mon Sep 17 00:00:00 2001 From: Howard Mao Date: Thu, 20 Jul 2017 19:44:23 +0000 Subject: [PATCH] make sure verilator builds correctly --- verisim/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/verisim/Makefile b/verisim/Makefile index 144301a4..df9e7ef5 100644 --- a/verisim/Makefile +++ b/verisim/Makefile @@ -14,7 +14,7 @@ default: $(sim) debug: $(sim_debug) -CXXFLAGS := $(CXXFLAGS) -O1 -std=c++11 -I$(RISCV)/include +CXXFLAGS := $(CXXFLAGS) -O1 -std=c++11 -I$(RISCV)/include -D__STDC_FORMAT_MACROS LDFLAGS := $(LDFLAGS) -L$(RISCV)/lib -Wl,-rpath,$(RISCV)/lib -L$(sim_dir) -lfesvr -lpthread include $(base_dir)/Makefrag