From c481dc2ee84e588820e71a4157b7c42a443112d2 Mon Sep 17 00:00:00 2001 From: Albert Magyar Date: Tue, 12 Jan 2021 22:53:35 -0800 Subject: [PATCH] Add 16-core LargeBOOM config to firechip * Fix Jerry's comment on accidentally mixing multiple BOOM configs --- .../firechip/src/main/scala/TargetConfigs.scala | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/generators/firechip/src/main/scala/TargetConfigs.scala b/generators/firechip/src/main/scala/TargetConfigs.scala index b70ef647..bece1896 100644 --- a/generators/firechip/src/main/scala/TargetConfigs.scala +++ b/generators/firechip/src/main/scala/TargetConfigs.scala @@ -200,3 +200,14 @@ class FireSimMulticlockRocketConfig extends Config( new WithFireSimConfigTweaks ++ new chipyard.DividedClockRocketConfig) +//********************************************************************************** +// System with 16 LargeBOOMs that can be simulated with Golden Gate optimizations +// - Requires MTModels and MCRams mixins as prefixes to the platform config +// - May require larger build instances or JVM memory footprints +//*********************************************************************************/ +class FireSim16LargeBoomConfig extends Config( + new WithDefaultFireSimBridges ++ + new WithDefaultMemModel ++ + new WithFireSimConfigTweaks ++ + new boom.common.WithNLargeBooms(16) ++ + new chipyard.config.AbstractConfig)