diff --git a/build.sbt b/build.sbt
index d3e99cc9..b1f7e004 100644
--- a/build.sbt
+++ b/build.sbt
@@ -186,7 +186,7 @@ lazy val chipyard = (project in file("generators/chipyard"))
   .dependsOn(rocketchip, boom, hwacha, sifive_blocks, sifive_cache, iocell,
     sha3, // On separate line to allow for cleaner tutorial-setup patches
     dsptools, `rocket-dsp-utils`,
-    gemmini, icenet, tracegen, cva6, nvdla, sodor)
+    gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex)
   .settings(libraryDependencies ++= rocketLibDeps.value)
   .settings(commonSettings)
 
@@ -218,6 +218,11 @@ lazy val cva6 = (project in file("generators/cva6"))
   .settings(libraryDependencies ++= rocketLibDeps.value)
   .settings(commonSettings)
 
+lazy val ibex = (project in file("generators/ibex"))
+  .dependsOn(rocketchip)
+  .settings(libraryDependencies ++= rocketLibDeps.value)
+  .settings(commonSettings)
+
 lazy val sodor = (project in file("generators/riscv-sodor"))
   .dependsOn(rocketchip)
   .settings(libraryDependencies ++= rocketLibDeps.value)
diff --git a/generators/chipyard/src/main/scala/config/IbexConfigs.scala b/generators/chipyard/src/main/scala/config/IbexConfigs.scala
new file mode 100644
index 00000000..ef4f52ac
--- /dev/null
+++ b/generators/chipyard/src/main/scala/config/IbexConfigs.scala
@@ -0,0 +1,14 @@
+package chipyard
+
+import chisel3._
+
+import freechips.rocketchip.config.{Config}
+
+// ---------------------
+// Ibex Configs
+// ---------------------
+
+class IbexConfig extends Config(
+  new chipyard.config.WithBootROM ++               // Ibex reset vector is at 0x80
+  new ibex.WithNIbexCores(1) ++                    // single Ibex core
+  new chipyard.config.AbstractConfig)
\ No newline at end of file