Refactor barstools for new versions of things.
- No handlebars (not being published for Scala 2.12) - Update for new annotations APIs Bump sbt-dependency-graph to 0.9.2 for this scala version
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@@ -23,70 +23,78 @@ object AllModules {
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}
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}
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case class ParsedInput(args: Seq[String]) extends LazyLogging {
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var input: Option[String] = None
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var output: Option[String] = None
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var topOutput: Option[String] = None
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var harnessOutput: Option[String] = None
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var annoFile: Option[String] = None
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var synTop: Option[String] = None
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var harnessTop: Option[String] = None
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var seqMemFlags: Option[String] = Some("-o:unused.confg")
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var listClocks: Option[String] = Some("-o:unused.clocks")
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trait HasTapeoutOptions { self: ExecutionOptionsManager with HasFirrtlOptions =>
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var tapeoutOptions = TapeoutOptions()
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var usedOptions = Set.empty[Integer]
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args.zipWithIndex.foreach{ case (arg, i) =>
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arg match {
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case "-i" => {
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input = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "-o" => {
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output = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--top-o" => {
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topOutput = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--harness-o" => {
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harnessOutput = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--anno-file" => {
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annoFile = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--syn-top" => {
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synTop = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--harness-top" => {
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harnessTop = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--seq-mem-flags" => {
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seqMemFlags = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case "--list-clocks" => {
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listClocks = Some(args(i+1))
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usedOptions = usedOptions | Set(i+1)
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}
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case _ => {
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if (! (usedOptions contains i)) {
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logger.error("Unknown option " + arg)
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}
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}
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parser.note("tapeout options")
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parser.opt[String]("harness-o")
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.abbr("tho")
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.valueName("<harness-output>")
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.foreach { x =>
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tapeoutOptions = tapeoutOptions.copy(
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harnessOutput = Some(x)
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)
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}.text {
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"use this to generate a harness at <harness-output>"
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}
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}
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parser.opt[String]("syn-top")
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.abbr("tst")
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.valueName("<syn-top")
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.foreach { x =>
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tapeoutOptions = tapeoutOptions.copy(
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synTop = Some(x)
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)
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}.text {
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"use this to set synTop"
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}
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parser.opt[String]("harness-top")
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.abbr("tht")
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.valueName("<harness-top>")
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.foreach { x =>
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tapeoutOptions = tapeoutOptions.copy(
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harnessTop = Some(x)
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)
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}.text {
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"use this to set harnessTop"
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}
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parser.opt[String]("list-clocks")
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.abbr("tlc")
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.valueName("<clocks>")
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.foreach { x =>
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tapeoutOptions = tapeoutOptions.copy(
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listClocks = Some(x)
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)
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}.text {
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"use this to list <clocks>"
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}
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parser.note("")
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}
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case class TapeoutOptions(
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input: Option[String] = None,
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output: Option[String] = None,
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topOutput: Option[String] = None,
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harnessOutput: Option[String] = None,
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annoFile: Option[String] = None,
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synTop: Option[String] = None,
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harnessTop: Option[String] = None,
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seqMemFlags: Option[String] = Some("-o:unused.confg"),
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listClocks: Option[String] = Some("-o:unused.clocks")
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) extends LazyLogging
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// Requires two phases, one to collect modules below synTop in the hierarchy
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// and a second to remove those modules to generate the test harness
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sealed trait GenerateTopAndHarnessApp extends App with LazyLogging {
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lazy val options: ParsedInput = ParsedInput(args)
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val optionsManager = new ExecutionOptionsManager("tapeout") with HasFirrtlOptions with HasTapeoutOptions
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if (!optionsManager.parse(args)) {
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throw new Exception("Error parsing options!")
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}
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lazy val options = optionsManager.tapeoutOptions
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lazy val input = options.input
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lazy val output = options.output
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lazy val topOutput = options.topOutput
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@@ -116,34 +124,32 @@ sealed trait GenerateTopAndHarnessApp extends App with LazyLogging {
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pre ++ enumerate ++ post
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}
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private def getFirstPhaseAnnotations(top: Boolean): AnnotationMap = {
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if (top) {
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private def getFirstPhaseAnnotations(top: Boolean): AnnotationSeq = {
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if (top) {
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//Load annotations from file
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val annotationArray = annoFile match {
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val annotationArray: Seq[Annotation] = annoFile match {
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case None => Array[Annotation]()
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case Some(fileName) => {
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val annotations = new File(fileName)
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if(annotations.exists) {
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val annotationsYaml = io.Source.fromFile(annotations).getLines().mkString("\n").parseYaml
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annotationsYaml.convertTo[Array[Annotation]]
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val annotationsYaml = io.Source.fromFile(annotations).getLines().mkString("\n")
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Seq(AnnotationUtils.fromYaml(annotationsYaml)) // TODO
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} else {
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Array[Annotation]()
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Seq[Annotation]()
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}
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}
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}
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// add new annotations
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AnnotationMap(Seq(
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passes.memlib.InferReadWriteAnnotation(
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s"${synTop.get}"
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),
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passes.clocklist.ClockListAnnotation(
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AnnotationSeq(Seq(
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passes.memlib.InferReadWriteAnnotation,
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passes.clocklist.ClockListAnnotation.parse(
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s"-c:${synTop.get}:-m:${synTop.get}:${listClocks.get}"
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),
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passes.memlib.ReplSeqMemAnnotation(
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passes.memlib.ReplSeqMemAnnotation.parse(
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s"-c:${synTop.get}:${seqMemFlags.get}"
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)
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) ++ annotationArray)
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} else { AnnotationMap(Seq.empty) }
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} else { AnnotationSeq(Seq.empty) }
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}
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private def getSecondPhasePasses: Seq[Transform] = {
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@@ -156,31 +162,36 @@ sealed trait GenerateTopAndHarnessApp extends App with LazyLogging {
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}
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// always the same for now
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private def getSecondPhaseAnnotations: AnnotationMap = AnnotationMap(Seq.empty)
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private def getSecondPhaseAnnotations: AnnotationSeq = AnnotationSeq(Seq.empty)
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// Top Generation
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protected def firstPhase(top: Boolean, harness: Boolean): Unit = {
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require(top || harness, "Must specify either top or harness")
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firrtl.Driver.compile(
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input.get,
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topOutput.getOrElse(output.get),
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new VerilogCompiler(),
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Parser.UseInfo,
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getFirstPhasePasses(top, harness),
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getFirstPhaseAnnotations(top)
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val firrtlOptions = optionsManager.firrtlOptions
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optionsManager.firrtlOptions = firrtlOptions.copy(
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annotations = firrtlOptions.annotations ++ getFirstPhaseAnnotations(top)
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)
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optionsManager.firrtlOptions = firrtlOptions.copy(
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customTransforms = firrtlOptions.customTransforms ++ getFirstPhasePasses(top, harness)
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)
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}
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// Harness Generation
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protected def secondPhase: Unit = {
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firrtl.Driver.compile(
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input.get,
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harnessOutput.getOrElse(output.get),
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new VerilogCompiler(),
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Parser.UseInfo,
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getSecondPhasePasses,
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getSecondPhaseAnnotations
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val firrtlOptions = optionsManager.firrtlOptions
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optionsManager.firrtlOptions = firrtlOptions.copy(
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annotations = firrtlOptions.annotations ++ getSecondPhaseAnnotations
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)
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optionsManager.firrtlOptions = firrtlOptions.copy(
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customTransforms = firrtlOptions.customTransforms ++ getSecondPhasePasses
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)
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}
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protected def execute: Unit = {
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firrtl.Driver.execute(optionsManager)
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}
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}
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@@ -191,6 +202,7 @@ object GenerateTop extends GenerateTopAndHarnessApp {
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n => logger.warn(s"Not using generic output filename $n since you asked for just a top-level output and also specified a generic output.")})
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// Only need a single phase to generate the top module
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firstPhase(top = true, harness = false)
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execute
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}
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object GenerateHarness extends GenerateTopAndHarnessApp {
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@@ -206,6 +218,7 @@ object GenerateHarness extends GenerateTopAndHarnessApp {
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// Do minimal work for the first phase to generate test harness
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firstPhase(top = false, harness = true)
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secondPhase
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execute
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}
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object GenerateTopAndHarness extends GenerateTopAndHarnessApp {
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@@ -214,4 +227,5 @@ object GenerateTopAndHarness extends GenerateTopAndHarnessApp {
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// Do everything, top and harness generation
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firstPhase(top = true, harness = true)
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secondPhase
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execute
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}
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@@ -15,13 +15,10 @@ object WriteConfig {
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object GetTargetDir {
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def apply(state: CircuitState): String = {
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val annos = state.annotations.getOrElse(AnnotationMap(Seq.empty)).annotations
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val annos = state.annotations
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val destDir = annos.map {
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case Annotation(f, t, s) if t == classOf[transforms.BlackBoxSourceHelper] =>
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transforms.BlackBoxSource.parse(s) match {
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case Some(transforms.BlackBoxTargetDir(dest)) => Some(dest)
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case _ => None
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}
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case Annotation(f, t, s) if t == classOf[firrtl.transforms.BlackBoxTargetDirAnno] =>
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Some(s)
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case _ => None
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}.flatten
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val loc = {
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@@ -45,14 +42,14 @@ class TechnologyLocation extends Transform {
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def outputForm: CircuitForm = LowForm
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def execute(state: CircuitState) = throw new Exception("Technology Location transform execution doesn't work!")
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def get(state: CircuitState): String = {
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val annos = state.annotations.getOrElse(AnnotationMap(Seq.empty)).annotations
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val annos = state.annotations
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val dir = annos.map {
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case Annotation(f, t, s) if t == classOf[TechnologyLocation] => Some(s)
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case _ => None
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}.flatten
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dir.length match {
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case 0 => ""
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case 1 =>
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case 1 =>
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val targetDir = new java.io.File(dir.head)
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if(!targetDir.exists()) throw new Exception("Technology yaml directory doesn't exist!")
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dir.head
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@@ -13,6 +13,8 @@ class ExampleModuleNeedsResetInverted extends Module with ResetInverter {
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val r = RegInit(0.U)
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io.out := r
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invert(this)
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}
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@@ -35,4 +37,4 @@ class ResetNSpec extends FreeSpec with Matchers {
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// bad
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}
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}
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}
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}
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@@ -25,10 +25,10 @@ class RetimeSpec extends FlatSpec with Matchers {
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it should "pass simple retime module annotation" in {
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val gen = () => new RetimeModule()
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val dir = uniqueDirName(gen, "RetimeModule")
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chisel3.Driver.execute(Array("-td", s"test_run_dir/$dir", "-foaf", s"test_run_dir/$dir/final.anno"), gen) shouldBe a [ChiselExecutionSuccess]
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chisel3.Driver.execute(Array("-td", s"test_run_dir/$dir", "-foaf", s"test_run_dir/$dir/final"), gen) shouldBe a [ChiselExecutionSuccess]
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val lines = io.Source.fromFile(s"test_run_dir/$dir/final.anno").getLines().map(normalized).toSeq
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lines should contain ("Annotation(ModuleName(RetimeModule,CircuitName(RetimeModule)),class barstools.tapeout.transforms.retime.RetimeTransform,retime)")
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val lines = io.Source.fromFile(s"test_run_dir/$dir/final.anno.json").getLines().map(normalized).mkString("\n")
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lines should include("barstools.tapeout.transforms.retime.RetimeTransform")
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}
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// TODO(azidar): need to fix/add instance annotations
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