diff --git a/src/main/scala/example/Configs.scala b/src/main/scala/example/Configs.scala
index f758740b..6e91fb26 100644
--- a/src/main/scala/example/Configs.scala
+++ b/src/main/scala/example/Configs.scala
@@ -50,7 +50,6 @@ class WithSimNetwork extends Config((site, here, up) => {
 })
 
 class BaseExampleConfig extends Config(
-  new WithSerialAdapter ++
   new freechips.rocketchip.chip.DefaultConfig)
 
 class DefaultExampleConfig extends Config(
diff --git a/src/main/scala/tlserdes/Configs.scala b/src/main/scala/tlserdes/Configs.scala
index 0bea9967..56a76c65 100644
--- a/src/main/scala/tlserdes/Configs.scala
+++ b/src/main/scala/tlserdes/Configs.scala
@@ -1,7 +1,6 @@
 package tlserdes
 
 import freechips.rocketchip.config.{Parameters, Config}
-import testchipip.WithSerialAdapter
 
 class WithTLSerdes extends Config((site, here, up) => {
   case TLSerdesWidth => 16
@@ -9,7 +8,6 @@ class WithTLSerdes extends Config((site, here, up) => {
 
 class DefaultSerdesConfig extends Config(
   new WithTLSerdes ++
-  new WithSerialAdapter ++
   new freechips.rocketchip.chip.DefaultConfig)
 
 class WithTwoMemChannels extends example.WithTwoMemChannels
diff --git a/testchipip b/testchipip
index 3935fdb0..3dfe32a3 160000
--- a/testchipip
+++ b/testchipip
@@ -1 +1 @@
-Subproject commit 3935fdb073a5c96c797302f7e86091df06596b94
+Subproject commit 3dfe32a3b8d7ff14899dec317d8dac11849ac6dd