Add Pads + other utilities (#7)

[stevo]: adds a bunch of pad frame commits, as well as beginning work on clocking annotations and constraints * start add io pads pass * save progress adding yaml pad info * saving some semi-presentable work -- parses yaml for pad templates and associates templates with ports * added black boxes to the module; still need to hook up * added supply pad yaml example; added option to not include pad for an IO, blackboxed that cat + bit extraction functions * rewrite createbbs and some other parts of the transform * finally got blackboxhelper to work -- seems there was a typo in the firrtl pass (?) have not connected them up properly in the padframe * finished first version of pad transform; need to add bells and whistles + special case stuff * made a bunch of changes in firrtl to shorthand things * done with padframe for signals * started major refactoring; first of pad yaml stuff * forgot to update verilogTemplate -> verilog * rename ParsePadYaml -> ChipPadsYaml; moved some stuff * separated out stuff that describes pads i.e. direction, type, side * forgot to update import for yamlhelpers * trying to make the process of creating annotations more structured * saving annotation helpers but prob better to switch to yaml * saving changes -- reworking annotations * fixing some bugs; properly annotated ports with pads * annotate supply pads * lesson (re)learned. cleaned up constants * finished adding supply pads to pad frame; still need to generate io file * also committing updated transform; still without io file * big typo was causing pad verilog files not to be generated * verilator passes with transform; had to fix verilog bb typo * added unused pads; added more thorough tests + did visual inspection of output; made some port types more explicit * renamed files/classes to be clearer * started creating pad io template * update spec so that transform order matters * get rid of logger * went around in circles with blackboxhelper + way to annotate * finished adding + testing pad.io creation * starting clkgen pass -- made model for asynchronously reset clk divider + wrappers for programmatic bundling * temporarily locating albert's utility functions here * saving work on clk constraints * redid input config passing -- pass in tech directory instead; seems like getting clk sink, src, and relationship works * not done; need to pause to do tapeout-y things. the clk gen pass gets all the clks and their sources, but i need to build a proper graph to handle clks coming out of muxes
2017-03-05 18:50:56 -08:00
parent e09cbe5b7e
commit f1c437f830
29 changed files with 2891 additions and 5 deletions
--- a/tapeout/src/main/scala/transforms/pads/AddIOPadsTransform.scala
+++ b/tapeout/src/main/scala/transforms/pads/AddIOPadsTransform.scala
@@ -0,0 +1,57 @@
+package barstools.tapeout.transforms.pads
+
+import firrtl._
+import firrtl.annotations._
+import firrtl.passes._
+import firrtl.ir._
+import barstools.tapeout.transforms._
+
+// Main Add IO Pad transform operates on low Firrtl
+class AddIOPadsTransform extends Transform with SimpleRun {
+
+  override def inputForm: CircuitForm = LowForm
+  override def outputForm: CircuitForm = LowForm
+
+  override def execute(state: CircuitState): CircuitState = {
+    val collectedAnnos = HasPadAnnotation(getMyAnnotations(state))
+    collectedAnnos match {
+      // Transform not used
+      case None => CircuitState(state.circuit, LowForm)
+      case Some(x) => 
+        val techLoc = (new TechnologyLocation).get(state)
+        // Get foundry pad templates from yaml
+        val foundryPads = FoundryPadsYaml.parse(techLoc)
+        val portPads = AnnotatePortPads(state.circuit, x.topModName, foundryPads, x.componentAnnos, 
+          HasPadAnnotation.getSide(x.defaultPadSide))
+        val supplyPads = AnnotateSupplyPads(foundryPads, x.supplyAnnos)
+        val (circuitWithBBs, bbAnnotations) = CreatePadBBs(state.circuit, portPads, supplyPads)
+        val namespace = Namespace(state.circuit)
+        val padFrameName = namespace newName s"${x.topModName}_PadFrame"
+        val topInternalName = namespace newName s"${x.topModName}_Internal"
+        val targetDir = barstools.tapeout.transforms.GetTargetDir(state)
+        PadPlacementFile.generate(techLoc, targetDir, padFrameName, portPads, supplyPads)
+        val passSeq = Seq(
+          Legalize,
+          ResolveGenders,
+          // Types really need to be known...
+          InferTypes,
+          new AddPadFrame(x.topModName, padFrameName, topInternalName, portPads, supplyPads),
+          RemoveEmpty,
+          CheckInitialization,
+          InferTypes,
+          Uniquify,
+          ResolveKinds,
+          ResolveGenders
+        )
+        // Expects BlackBox helper to be run after to inline pad Verilog!
+        val prevAnnos = state.annotations.getOrElse(AnnotationMap(Seq.empty)).annotations
+        val cs = CircuitState(
+          runPasses(circuitWithBBs, passSeq), 
+          LowForm, 
+          Some(AnnotationMap(prevAnnos ++ bbAnnotations))
+        )
+        // TODO: *.f file is overwritten on subsequent executions, but it doesn't seem to be used anywhere?
+        (new firrtl.transforms.BlackBoxSourceHelper).execute(cs)
+    }
+  }
+}