Formatting code to chisel standard

- ran sbt scalafmtAll
  - lot of small formatting changes
- added test that code must stay formatted
  - part of github actions workflow

src/test/scala/barstools/macros/CostFunction.scala

@@ -2,7 +2,6 @@ package barstools.macros
 
 import mdf.macrolib.SRAMMacro
 
-
 /** Tests to check that the cost function mechanism is working properly. */
 
 /** A test metric that simply favours memories with smaller widths, to test that

src/test/scala/barstools/macros/SpecificExamples.scala

@@ -187,7 +187,8 @@ class BOOMTest extends MacroCompilerSpec with HasSRAMGenerator {
 
   override val libPrefix = "src/test/resources"
 
-  val memSRAMs = mdf.macrolib.Utils.readMDFFromString("""
+  val memSRAMs = mdf.macrolib.Utils
+    .readMDFFromString("""
 [ {
   "type" : "sram",
   "name" : "_T_182_ext",

src/test/scala/barstools/tapeout/transforms/GenerateSpec.scala

@@ -42,10 +42,10 @@ class ToBeMadeExternal extends MultiIOModule {
 class GenerateExampleTester extends MultiIOModule {
   val success = IO(Output(Bool()))
 
-  val  mod = Module(new GenerateExampleModule)
+  val mod = Module(new GenerateExampleModule)
   mod.in := 1.U
 
-  val  mod2 = Module(new ToBeMadeExternal)
+  val mod2 = Module(new ToBeMadeExternal)
   mod2.in := 1.U
 
   val reg = RegInit(0.U(8.W))
@@ -91,10 +91,14 @@ class GenerateSpec extends AnyFreeSpec {
     val targetDir = "test_run_dir/generate_spec"
     generateTestData(targetDir)
 
-    GenerateTop.main(Array(
-      "-i", s"$targetDir/GenerateExampleTester.fir",
-      "-o", s"$targetDir/GenerateExampleTester.v"
-    ))
-    new File(s"$targetDir/GenerateExampleTester.v").exists() should be (true)
+    GenerateTop.main(
+      Array(
+        "-i",
+        s"$targetDir/GenerateExampleTester.fir",
+        "-o",
+        s"$targetDir/GenerateExampleTester.v"
+      )
+    )
+    new File(s"$targetDir/GenerateExampleTester.v").exists() should be(true)
   }
 }

src/test/scala/barstools/tapeout/transforms/GenerateTopSpec.scala

@@ -19,9 +19,12 @@ class GenerateTopSpec extends AnyFreeSpec with Matchers {
 
       GenerateTopAndHarness.main(
         Array(
-          "-i", s"$targetDir/ExampleModuleNeedsResetInverted.fir",
-          "-ll", "info",
-          "--log-file", transformListName
+          "-i",
+          s"$targetDir/ExampleModuleNeedsResetInverted.fir",
+          "-ll",
+          "info",
+          "--log-file",
+          transformListName
         )
       )
 
@@ -47,26 +50,45 @@ class GenerateTopSpec extends AnyFreeSpec with Matchers {
 
     GenerateTopAndHarness.main(
       Array(
-        "--target-dir", "test_run_dir/generate_top_spec",
-        "-i", s"$targetDir/BlackBoxFloatTester.fir",
-        "-o", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.v",
-        "-tho", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.v",
-        "-i", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.fir",
-        "--syn-top", "UnitTestSuite",
-        "--harness-top", "TestHarness",
-        "-faf", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.anno.json",
-        "-tsaof", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.anno.json",
-        "-tdf", "firrtl_black_box_resource_files.top.f",
-        "-tsf", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.fir",
-        "-thaof", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.anno.json",
-        "-hdf", "firrtl_black_box_resource_files.harness.f",
-        "-thf", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.fir",
+        "--target-dir",
+        "test_run_dir/generate_top_spec",
+        "-i",
+        s"$targetDir/BlackBoxFloatTester.fir",
+        "-o",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.v",
+        "-tho",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.v",
+        "-i",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.fir",
+        "--syn-top",
+        "UnitTestSuite",
+        "--harness-top",
+        "TestHarness",
+        "-faf",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.anno.json",
+        "-tsaof",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.anno.json",
+        "-tdf",
+        "firrtl_black_box_resource_files.top.f",
+        "-tsf",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.fir",
+        "-thaof",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.anno.json",
+        "-hdf",
+        "firrtl_black_box_resource_files.harness.f",
+        "-thf",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.fir",
         "--infer-rw",
-        "--repl-seq-mem", "-c:TestHarness:-o:chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.mems.conf",
-        "-thconf", "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.mems.conf",
-        "-td", "test_run_dir/from-ci",
-        "-ll", "info",
-        "--log-file", logOutputName
+        "--repl-seq-mem",
+        "-c:TestHarness:-o:chipyard.unittest.TestHarness.IceNetUnitTestConfig.top.mems.conf",
+        "-thconf",
+        "chipyard.unittest.TestHarness.IceNetUnitTestConfig.harness.mems.conf",
+        "-td",
+        "test_run_dir/from-ci",
+        "-ll",
+        "info",
+        "--log-file",
+        logOutputName
       )
     )
 

src/test/scala/barstools/tapeout/transforms/ResetInverterSpec.scala

@@ -22,7 +22,8 @@ class ExampleModuleNeedsResetInverted extends Module with ResetInverter {
 
 class ResetNSpec extends AnyFreeSpec with Matchers {
   "Inverting reset needs to be done throughout module in Chirrtl" in {
-    val chirrtl = (new ChiselStage).emitChirrtl(new ExampleModuleNeedsResetInverted, Array("--target-dir", "test_run_dir/reset_n_spec"))
+    val chirrtl = (new ChiselStage)
+      .emitChirrtl(new ExampleModuleNeedsResetInverted, Array("--target-dir", "test_run_dir/reset_n_spec"))
     chirrtl should include("input reset :")
     (chirrtl should not).include("input reset_n :")
     (chirrtl should not).include("node reset = not(reset_n)")