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Formatting code to chisel standard

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- ran sbt scalafmtAll
  - lot of small formatting changes
- added test that code must stay formatted
  - part of github actions workflow
This commit is contained in:
chick
2021-08-16 15:35:22 -07:00
parent 4e9b44cad8
commit edb1537561
15 changed files with 145 additions and 99 deletions
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43
src/main/scala/barstools/tapeout/transforms/GenerateTopAndHarness.scala
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@@ -13,20 +13,20 @@ import logger.LazyLogging
// Requires two phases, one to collect modules below synTop in the hierarchy
// and a second to remove those modules to generate the test harness
private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogging {
val synTop: Option[String] = annotations.collectFirst { case SynTopAnnotation(s) => s }
val topFir: Option[String] = annotations.collectFirst { case TopFirAnnotation(s) => s }
val harnessFir: Option[String] = annotations.collectFirst { case HarnessFirAnnotation(s) => s }
val topAnnoOut: Option[String] = annotations.collectFirst { case TopAnnoOutAnnotation(s) => s }
val synTop: Option[String] = annotations.collectFirst { case SynTopAnnotation(s) => s }
val topFir: Option[String] = annotations.collectFirst { case TopFirAnnotation(s) => s }
val harnessFir: Option[String] = annotations.collectFirst { case HarnessFirAnnotation(s) => s }
val topAnnoOut: Option[String] = annotations.collectFirst { case TopAnnoOutAnnotation(s) => s }
val harnessAnnoOut: Option[String] = annotations.collectFirst { case HarnessAnnoOutAnnotation(s) => s }
val harnessTop: Option[String] = annotations.collectFirst { case HarnessTopAnnotation(h) => h }
val harnessConf: Option[String] = annotations.collectFirst { case HarnessConfAnnotation(h) => h }
val harnessOutput: Option[String] = annotations.collectFirst { case HarnessOutputAnnotation(h) => h }
val topDotfOut: Option[String] = annotations.collectFirst { case TopDotfOutAnnotation(h) => h }
val harnessTop: Option[String] = annotations.collectFirst { case HarnessTopAnnotation(h) => h }
val harnessConf: Option[String] = annotations.collectFirst { case HarnessConfAnnotation(h) => h }
val harnessOutput: Option[String] = annotations.collectFirst { case HarnessOutputAnnotation(h) => h }
val topDotfOut: Option[String] = annotations.collectFirst { case TopDotfOutAnnotation(h) => h }
val harnessDotfOut: Option[String] = annotations.collectFirst { case HarnessDotfOutAnnotation(h) => h }
val annoFiles: List[String] = annotations.flatMap {
case InputAnnotationFileAnnotation(f) => Some(f)
case _ => None
case _ => None
}.toList
lazy val rootCircuitTarget = CircuitTarget(harnessTop.get)
@@ -36,11 +36,11 @@ private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogg
// Dump firrtl and annotation files
protected def dump(
circuit: Circuit,
annotations: AnnotationSeq,
firFile: Option[String],
annoFile: Option[String]
): Unit = {
circuit: Circuit,
annotations: AnnotationSeq,
firFile: Option[String],
annoFile: Option[String]
): Unit = {
firFile.foreach { firPath =>
val outputFile = new java.io.PrintWriter(firPath)
outputFile.write(circuit.serialize)
@@ -49,9 +49,9 @@ private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogg
annoFile.foreach { annoPath =>
val outputFile = new java.io.PrintWriter(annoPath)
outputFile.write(JsonProtocol.serialize(annotations.filter(_ match {
case _: DeletedAnnotation => false
case _: EmittedComponent => false
case _: EmittedAnnotation[_] => false
case _: DeletedAnnotation => false
case _: EmittedComponent => false
case _: EmittedAnnotation[_] => false
case _: FirrtlCircuitAnnotation => false
case _ => true
})))
@@ -104,10 +104,10 @@ private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogg
val generatorAnnotations = annotations
.filterNot(_.isInstanceOf[OutputFileAnnotation])
.map {
case ReplSeqMemAnnotation(i, _) => ReplSeqMemAnnotation(i, harnessConf.get)
case HarnessOutputAnnotation(s) => OutputFileAnnotation(s)
case anno => anno
} ++ harnessAnnos
case ReplSeqMemAnnotation(i, _) => ReplSeqMemAnnotation(i, harnessConf.get)
case HarnessOutputAnnotation(s) => OutputFileAnnotation(s)
case anno => anno
} ++ harnessAnnos
val annos = new FirrtlStage().execute(Array.empty, generatorAnnotations)
annos.collectFirst { case FirrtlCircuitAnnotation(circuit) => circuit } match {
@@ -119,7 +119,6 @@ private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogg
}
}
object GenerateTop extends StageMain(new TapeoutStage(doHarness = false))
object GenerateTopAndHarness extends StageMain(new TapeoutStage(doHarness = true))