Add PortAPI between IO and Harness blocks

2023-10-02 17:30:13 -07:00
parent 8c1319073c
commit eb3a0aecf4
32 changed files with 715 additions and 822 deletions
--- a/fpga/src/main/scala/arty/Configs.scala
+++ b/fpga/src/main/scala/arty/Configs.scala
@@ -17,7 +17,8 @@ import chipyard.{BuildSystem}

 // DOC include start: AbstractArty and Rocket
 class WithArtyTweaks extends Config(
-  new WithArtyResetHarnessBinder ++
+  new WithArtyDebugResetHarnessBinder ++
+  new WithArtyJTAGResetHarnessBinder ++
  new WithArtyJTAGHarnessBinder ++
  new WithArtyUARTHarnessBinder ++
  new WithDebugResetPassthrough ++