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fix issue #20: PWMConfig elaboration error due to requirement failure

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This commit is contained in:
Howard Mao
2018-02-23 10:43:52 -08:00
parent e3f05011c1
commit eaff48e312
1 changed files with 5 additions and 8 deletions
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13
src/main/scala/example/PWM.scala
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@@ -42,17 +42,14 @@ trait PWMTLModule extends HasRegMap {
implicit val p: Parameters implicit val p: Parameters
def params: PWMParams def params: PWMParams
val w = params.beatBytes * 8
require(w <= 32)
// How many clock cycles in a PWM cycle? // How many clock cycles in a PWM cycle?
val period = Reg(UInt(w.W)) val period = Reg(UInt(32.W))
// For how many cycles should the clock be high? // For how many cycles should the clock be high?
val duty = Reg(UInt(w.W)) val duty = Reg(UInt(32.W))
// Is the PWM even running at all? // Is the PWM even running at all?
val enable = RegInit(false.B) val enable = RegInit(false.B)
val base = Module(new PWMBase(w)) val base = Module(new PWMBase(32))
io.pwmout := base.io.pwmout io.pwmout := base.io.pwmout
base.io.period := period base.io.period := period
base.io.duty := duty base.io.duty := duty
@@ -60,9 +57,9 @@ trait PWMTLModule extends HasRegMap {
regmap( regmap(
0x00 -> Seq( 0x00 -> Seq(
RegField(w, period)), RegField(32, period)),
0x04 -> Seq( 0x04 -> Seq(
RegField(w, duty)), RegField(32, duty)),
0x08 -> Seq( 0x08 -> Seq(
RegField(1, enable))) RegField(1, enable)))
} }