Connected UART nicely

2020-09-11 16:55:25 -07:00
parent 56eead4053
commit e98a0f172f
5 changed files with 11 additions and 91 deletions
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -26,7 +26,7 @@ CONFIG            := FakeBringupConfig
 CONFIG_PACKAGE    := chipyard.fpga.vcu118
 GENERATOR_PACKAGE := chipyard
 TB                := none # unused
-TOP               := ChipTop
+TOP               := VCU118Platform

 # setup the board to use
 BOARD ?= arty