From e8c1b09d703e8ffd052e8b177f7e1ad3fb5b9835 Mon Sep 17 00:00:00 2001 From: nayiri-k Date: Fri, 10 Mar 2023 22:37:31 -0800 Subject: [PATCH] added note about generated-src being different for commercial/openroad flows --- docs/VLSI/Sky130-Commercial-Tutorial.rst | 13 +++++++++++-- docs/VLSI/Sky130-OpenROAD-Tutorial.rst | 9 +++++++++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/docs/VLSI/Sky130-Commercial-Tutorial.rst b/docs/VLSI/Sky130-Commercial-Tutorial.rst index ccbdc157..62e1659b 100644 --- a/docs/VLSI/Sky130-Commercial-Tutorial.rst +++ b/docs/VLSI/Sky130-Commercial-Tutorial.rst @@ -1,7 +1,7 @@ .. _sky130-commercial-tutorial: -Sky130 Tutorial -=============== +Sky130 Commercial Tutorial +========================== The ``vlsi`` folder of this repository contains an example Hammer flow with the TinyRocketConfig from Chipyard. This example tutorial uses the built-in Sky130 technology plugin and requires access to the included Cadence and Mentor tool plugin submodules. Cadence is necessary for synthesis & place-and-route, while Mentor is needed for DRC & LVS. Project Structure @@ -121,6 +121,15 @@ The command ``make buildfile`` generates a set of Make targets in ``build/hammer It needs to be re-run if environment variables are changed. It is recommended that you edit these variables directly in the Makefile rather than exporting them to your shell environment. +The ``buildfile`` make target has dependencies on both (1) the Verilog that is elaborated from all Chisel sources +and (2) the mapping of memory instances in the design to SRAM macros; +all files related to these two steps reside in the ``generated-src/chipyard.TestHarness.TinyRocketConfig-ChipTop`` directory. +Note that the files in ``generated-src`` vary for each tool/technology flow. +This especially applies to the Sky130 Commercial vs OpenROAD tutorial flows +(due to the ``ENABLE_YOSYS_FLOW`` flag present for the OpenROAD flow), so these flows should be run in separate +chipyard installations. If the wrong sources are generated, simply run ``make buildfile -B`` to rebuild all targets correctly. + + For the purpose of brevity, in this tutorial we will set the Make variable ``tutorial=sky130-commercial``, which will cause additional variables to be set in ``tutorial.mk``, a few of which are summarized as follows: diff --git a/docs/VLSI/Sky130-OpenROAD-Tutorial.rst b/docs/VLSI/Sky130-OpenROAD-Tutorial.rst index e4f5f80a..7dfda235 100644 --- a/docs/VLSI/Sky130-OpenROAD-Tutorial.rst +++ b/docs/VLSI/Sky130-OpenROAD-Tutorial.rst @@ -148,6 +148,15 @@ The command ``make buildfile`` generates a set of Make targets in ``build/hammer It needs to be re-run if environment variables are changed. It is recommended that you edit these variables directly in the Makefile rather than exporting them to your shell environment. +The ``buildfile`` make target has dependencies on both (1) the Verilog that is elaborated from all Chisel sources +and (2) the mapping of memory instances in the design to SRAM macros; +all files related to these two steps reside in the ``generated-src/chipyard.TestHarness.TinyRocketConfig-ChipTop`` directory. +Note that the files in ``generated-src`` vary for each tool/technology flow. +This especially applies to the Sky130 Commercial vs OpenROAD tutorial flows +(due to the ``ENABLE_YOSYS_FLOW`` flag, explained below), so these flows should be run in separate +chipyard installations. If the wrong sources are generated, simply run ``make buildfile -B`` to rebuild all targets correctly. + + For the sake of brevity, in this tutorial we will set the Make variable ``tutorial=sky130-openroad``, which will cause additional variables to be set in ``tutorial.mk``, a few of which are summarized as follows: