From 13f87e9ff602e6449dc33b3f62acde7b5c679fb9 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 09:11:56 -0800 Subject: [PATCH 01/10] Recommend riscv-tools for gemmini users in build-setup script --- scripts/build-setup.sh | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/scripts/build-setup.sh b/scripts/build-setup.sh index 77a988c3..7f14a738 100755 --- a/scripts/build-setup.sh +++ b/scripts/build-setup.sh @@ -87,6 +87,27 @@ run_step() { { +# esp-tools should ONLY be used for hwacha. +# Check for this, since many users will be attempting to use this with gemmini +if [ $TOOLCHAIN_TYPE == "esp-tools" ]; then + while true; do + read -p "WARNING: You are trying to install the esp-tools toolchain."$'n'"This should ONLY be used for Hwacha development."$'\n'"Gemmini should be used with riscv-tools."$'\n'"Type \"y\" to continue if this is intended, or \"n\" if not: " validate + case "$validate" in + y | Y) + echo "Installing esp-tools." + break + ;; + n | N) + error "Rerun with riscv-tools" + exit 3 + ;; + *) + error "Invalid response. Please type \"y\" or \"n\"" + ;; + esac + done +fi + # setup and install conda environment if run_step "1"; then # note: lock file must end in .conda-lock.yml - see https://github.com/conda-incubator/conda-lock/issues/154 From 11a479673180230f1fa4c3531a36bea295711a78 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 09:13:46 -0800 Subject: [PATCH 02/10] Advise riscv-tools for gemmini users in docs --- docs/Chipyard-Basics/Initial-Repo-Setup.rst | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/docs/Chipyard-Basics/Initial-Repo-Setup.rst b/docs/Chipyard-Basics/Initial-Repo-Setup.rst index 6543afc2..2102c1fb 100644 --- a/docs/Chipyard-Basics/Initial-Repo-Setup.rst +++ b/docs/Chipyard-Basics/Initial-Repo-Setup.rst @@ -63,9 +63,11 @@ Start by checking out the proper Chipyard version. Run: git checkout |version| Next run the following script to fully setup Chipyard with a specific toolchain. -There are two toolchains, one for normal RISC-V programs called ``riscv-tools`` which is the one needed for most Chipyard use-cases, and another for Hwacha/Gemmini called ``esp-tools``. +There are two toolchains, one for normal RISC-V programs called ``riscv-tools`` which is the one needed for most Chipyard use-cases, and another for Hwacha called ``esp-tools``. Run the following script based off which compiler you would like to use. +.. Note:: Prior versions of Chipyard recommended ``esp-tools`` for Gemmini development. Gemmini should now be used with the standard ``riscv-tools``. + .. Warning:: The following script will complete a "full" installation of Chipyard which may take a long time depending on the system. Ensure that this script completes fully (no interruptions) before continuing on. From 95df7c9e7ec0634ccfffe30247455b4a32865fbd Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 09:15:32 -0800 Subject: [PATCH 03/10] Bump spike --- toolchains/riscv-tools/riscv-isa-sim | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/toolchains/riscv-tools/riscv-isa-sim b/toolchains/riscv-tools/riscv-isa-sim index 0eec0c91..46176719 160000 --- a/toolchains/riscv-tools/riscv-isa-sim +++ b/toolchains/riscv-tools/riscv-isa-sim @@ -1 +1 @@ -Subproject commit 0eec0c911933ccc722d4b4479a6c4b8ac68f2f52 +Subproject commit 461767199aac9c15894513254ae4844de5ee78d0 From 30019f3fd739c49206afafea84b316312832efd8 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 09:23:08 -0800 Subject: [PATCH 04/10] Install libgemmini in build-toolchain-extra --- scripts/build-toolchain-extra.sh | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/scripts/build-toolchain-extra.sh b/scripts/build-toolchain-extra.sh index 1bc54297..f81ec135 100755 --- a/scripts/build-toolchain-extra.sh +++ b/scripts/build-toolchain-extra.sh @@ -102,4 +102,9 @@ echo '==> Installing espresso logic minimizer' echo '==> Installing libgloss' CC= CXX= SRCDIR="$(pwd)/toolchains" module_all libgloss --prefix="${RISCV}/riscv${XLEN}-unknown-elf" --host=riscv${XLEN}-unknown-elf +if [ $TOOLCHAIN == "riscv-tools" ]; then + echo '==> Installing gemmini spike extensions' + make -C $RDIR/generators/gemmini/software/libgemmini install +fi + echo "Extra Toolchain Utilities/Tests Build Complete!" From e5a734e20a2f4f54db14a190bc0de5efe51f15b2 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 09:59:58 -0800 Subject: [PATCH 05/10] Bump gemmini --- generators/gemmini | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/generators/gemmini b/generators/gemmini index 74251dc6..b6389f3e 160000 --- a/generators/gemmini +++ b/generators/gemmini @@ -1 +1 @@ -Subproject commit 74251dc61f971fd684bc37963f7db9d8a5bd206a +Subproject commit b6389f3ea7bbf070aa3dd40972daa5be7e2d4261 From bcbe3b7f1f40d1c388aca68df498fd7dd4d16e89 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 10:36:09 -0800 Subject: [PATCH 06/10] Init gemmini before installing libgemmini --- scripts/build-toolchain-extra.sh | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/build-toolchain-extra.sh b/scripts/build-toolchain-extra.sh index f81ec135..54afe983 100755 --- a/scripts/build-toolchain-extra.sh +++ b/scripts/build-toolchain-extra.sh @@ -102,8 +102,12 @@ echo '==> Installing espresso logic minimizer' echo '==> Installing libgloss' CC= CXX= SRCDIR="$(pwd)/toolchains" module_all libgloss --prefix="${RISCV}/riscv${XLEN}-unknown-elf" --host=riscv${XLEN}-unknown-elf +cd $RDIR if [ $TOOLCHAIN == "riscv-tools" ]; then echo '==> Installing gemmini spike extensions' + git submodule update --init generators/gemmini + cd generators/gemmini + git submodule update --init software/libgemmini make -C $RDIR/generators/gemmini/software/libgemmini install fi From 48905323d11ced8c2ac7efe27f9b845597b0b82a Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Sun, 5 Feb 2023 23:11:16 -0800 Subject: [PATCH 07/10] Fix spiketile not compiling: --- generators/chipyard/src/main/resources/csrc/spiketile.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/generators/chipyard/src/main/resources/csrc/spiketile.cc b/generators/chipyard/src/main/resources/csrc/spiketile.cc index 06b57ab3..bedc41f3 100644 --- a/generators/chipyard/src/main/resources/csrc/spiketile.cc +++ b/generators/chipyard/src/main/resources/csrc/spiketile.cc @@ -260,11 +260,11 @@ extern "C" void spike_tile(int hartid, char* isa, "vlen:128,elen:64", false, endianness_little, - false, pmpregions, std::vector(), std::vector(), - false); + false, + 0); processor_t* p = new processor_t(isa_parser, cfg, simif, From 9ef1612d41fd57529c03e9bdc1c8beb4aad3d955 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Wed, 8 Feb 2023 15:55:42 -0800 Subject: [PATCH 08/10] Use specific versions of riscv-tools/esp-tools --- conda-reqs/esp-tools.yaml | 2 +- conda-reqs/riscv-tools.yaml | 2 +- conda-requirements-riscv-tools.yaml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/conda-reqs/esp-tools.yaml b/conda-reqs/esp-tools.yaml index 4c4bc949..9603f747 100644 --- a/conda-reqs/esp-tools.yaml +++ b/conda-reqs/esp-tools.yaml @@ -14,4 +14,4 @@ dependencies: # https://docs.conda.io/projects/conda/en/latest/user-guide/concepts/pkg-specs.html#package-match-specifications # documentation on package_spec syntax for constraining versions - - esp-tools # from ucb-bar channel - https://github.com/ucb-bar/esp-tools-feedstock + - esp-tools=1.0.1 # from ucb-bar channel - https://github.com/ucb-bar/esp-tools-feedstock diff --git a/conda-reqs/riscv-tools.yaml b/conda-reqs/riscv-tools.yaml index 9edd0d32..ab667b79 100644 --- a/conda-reqs/riscv-tools.yaml +++ b/conda-reqs/riscv-tools.yaml @@ -14,4 +14,4 @@ dependencies: # https://docs.conda.io/projects/conda/en/latest/user-guide/concepts/pkg-specs.html#package-match-specifications # documentation on package_spec syntax for constraining versions - - riscv-tools # from ucb-bar channel - https://github.com/ucb-bar/riscv-tools-feedstock + - riscv-tools=1.0.1 # from ucb-bar channel - https://github.com/ucb-bar/riscv-tools-feedstock diff --git a/conda-requirements-riscv-tools.yaml b/conda-requirements-riscv-tools.yaml index bbc06729..131c3ef5 100644 --- a/conda-requirements-riscv-tools.yaml +++ b/conda-requirements-riscv-tools.yaml @@ -26,7 +26,7 @@ dependencies: - binutils - dromajo # from ucb-bar channel - https://github.com/riscv-boom/dromajo - - riscv-tools # from ucb-bar channel - https://github.com/ucb-bar/riscv-tools-feedstock + - riscv-tools=1.0.1 # from ucb-bar channel - https://github.com/ucb-bar/riscv-tools-feedstock - firtool # from ucb-bar channel - https://github.com/ucb-bar/firtool-feedstock # firemarshal deps From beb3e6d8b58351be01684f67b4215b98c864c4df Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Wed, 8 Feb 2023 20:01:27 -0800 Subject: [PATCH 09/10] Bump libgloss --- toolchains/libgloss | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/toolchains/libgloss b/toolchains/libgloss index 04b24976..0ecdf7fa 160000 --- a/toolchains/libgloss +++ b/toolchains/libgloss @@ -1 +1 @@ -Subproject commit 04b249764b1bc0b784b9f7ff422084f4b53a07ef +Subproject commit 0ecdf7fa08c9e40f9d60903b8189511beb8555ab From d32b0575f40951d2b132b332e954e0f66e47622f Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Wed, 8 Feb 2023 20:09:40 -0800 Subject: [PATCH 10/10] Use order-only pre-req for output_dir | In run-binary-hex only hex-ify the bin if bin given args --- common.mk | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/common.mk b/common.mk index 17f7a8e0..820b6d44 100644 --- a/common.mk +++ b/common.mk @@ -267,15 +267,15 @@ SIM_DEBUG_PREREQ = $(sim_debug) endif # run normal binary with hardware-logged insn dissassembly -run-binary: $(output_dir) $(SIM_PREREQ) check-binary +run-binary: $(SIM_PREREQ) check-binary | $(output_dir) (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) # run simulator as fast as possible (no insn disassembly) -run-binary-fast: $(output_dir) $(SIM_PREREQ) check-binary +run-binary-fast: $(SIM_PREREQ) check-binary | $(output_dir) (set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $(BINARY) >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log) run-fast: run-asm-tests-fast run-bmark-tests-fast @@ -283,23 +283,23 @@ run-fast: run-asm-tests-fast run-bmark-tests-fast ######################################################################################### # helper rules to run simulator with fast loadmem via hex files ######################################################################################### -$(binary_hex): $(output_dir) $(BINARY) - $(base_dir)/scripts/smartelf2hex.sh $(BINARY) > $(binary_hex) +$(binary_hex): $(firstword $(BINARY)) | $(output_dir) + $(base_dir)/scripts/smartelf2hex.sh $(firstword $(BINARY)) > $(binary_hex) run-binary-hex: check-binary -run-binary-hex: $(output_dir) $(SIM_PREREQ) $(binary_hex) +run-binary-hex: $(SIM_PREREQ) $(binary_hex) | $(output_dir) run-binary-hex: run-binary run-binary-hex: override LOADMEM_ADDR = 80000000 run-binary-hex: override LOADMEM = $(binary_hex) run-binary-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR) run-binary-debug-hex: check-binary -run-binary-debug-hex: $(output_dir) $(SIM_DEBUG_REREQ) $(binary_hex) +run-binary-debug-hex: $(SIM_DEBUG_REREQ) $(binary_hex) | $(output_dir) run-binary-debug-hex: run-binary-debug run-binary-debug-hex: override LOADMEM_ADDR = 80000000 run-binary-debug-hex: override LOADMEM = $(binary_hex) run-binary-debug-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR) run-binary-fast-hex: check-binary -run-binary-fast-hex: $(output_dir) $(SIM_PREREQ) $(binary_hex) +run-binary-fast-hex: $(SIM_PREREQ) $(binary_hex) | $(output_dir) run-binary-fast-hex: run-binary-fast run-binary-fast-hex: override LOADMEM_ADDR = 80000000 run-binary-fast-hex: override LOADMEM = $(binary_hex) @@ -311,7 +311,7 @@ run-binary-fast-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(L $(output_dir): mkdir -p $@ -$(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% $(output_dir) +$(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% | $(output_dir) ln -sf $< $@ $(output_dir)/%.run: $(output_dir)/% $(SIM_PREREQ)