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bump rocket-chip to enable large memory spaces (#76)

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* bump rocket-chip to enable large memory spaces

* Tests pass with write mask bug fix

* fix verisim build

* Update to point to rocket-chip on master

* bump rocket-chip and barstools

This fixes the analog chisel bug and
incorporates the firrtl MDF support (h/t John Wright)
This commit is contained in:
Colin Schmidt
2019-05-14 10:22:31 -07:00
committed by GitHub
parent 00d8e04d93
commit e007b49179
7 changed files with 116 additions and 9 deletions
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7
vsim/Makefile
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@@ -28,6 +28,7 @@ rocketchip_vsrc_dir = $(ROCKETCHIP_DIR)/src/main/resources/vsrc
sim_vsrcs = \
$(VERILOG_FILE) \
$(HARNESS_FILE) \
$(HARNESS_SMEMS_FILE) \
$(SMEMS_FILE)
VCS = vcs -full64
@@ -62,13 +63,13 @@ $(simv_debug) : $(sim_vsrcs) $(sim_dotf)
+define+DEBUG -debug_pp
$(output_dir)/%.out: $(output_dir)/% $(simv)
$(simv) +verbose +max-cycles=1000000 $< 3>&1 1>&2 2>&3 | spike-dasm > $@
$(simv) +permissive -q +ntb_random_seed_automatic +verbose +max-cycles=1000000 +permissive-off $< 3>&1 1>&2 2>&3 | spike-dasm > $@
$(output_dir)/%.run: $(output_dir)/% $(simv)
$(simv) +max-cycles=1000000 $< && touch $@
$(simv) +permissive -q +ntb_random_seed_automatic +max-cycles=1000000 +permissive-off $< && touch $@
$(output_dir)/%.vpd: $(output_dir)/% $(simv_debug)
$(simv_debug) +vcdplusfile=$@ +max-cycles=1000000 $<
$(simv_debug) +permissive -q +ntb_random_seed_automatic +vcdplusfile=$@ +max-cycles=1000000 +permissive-off $<
run-regression-tests: $(addprefix $(output_dir)/,$(addsuffix .out,$(regression-tests)))