wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Bump to latest rocket-chip/chisel3.5.6

Browse Source
This commit is contained in:
Jerry Zhao
2023-03-20 23:26:53 -07:00
parent 7475bfb1a0
commit df2e5ad9dc
93 changed files with 106 additions and 119 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
generators/firechip/src/main/scala/FireSim.scala
View File

@@ -9,7 +9,7 @@ import chisel3.experimental.{IO}
import freechips.rocketchip.prci._
import freechips.rocketchip.subsystem.{BaseSubsystem, SubsystemDriveAsyncClockGroupsKey}
import freechips.rocketchip.config.{Field, Config, Parameters}
import org.chipsalliance.cde.config.{Field, Config, Parameters}
import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp, InModuleBody, ValName}
import freechips.rocketchip.util.{ResetCatchAndSync, RecordMap}