From d9317d6019331ec2a3a9285494c0a808b6ad2160 Mon Sep 17 00:00:00 2001
From: Tynan McAuley <tynan@niobiummicrosystems.com>
Date: Wed, 22 Feb 2023 22:02:53 -0800
Subject: [PATCH] Remove unused test file

This file is breaking the test build, the class it is testing was
removed in df3232f7d967d22570dd3c90706ce9422c25df07.
---
 .../transforms/ResetInverterSpec.scala        | 50 -------------------
 1 file changed, 50 deletions(-)
 delete mode 100644 src/test/scala/barstools/tapeout/transforms/ResetInverterSpec.scala

diff --git a/src/test/scala/barstools/tapeout/transforms/ResetInverterSpec.scala b/src/test/scala/barstools/tapeout/transforms/ResetInverterSpec.scala
deleted file mode 100644
index 5d4c4ab3..00000000
--- a/src/test/scala/barstools/tapeout/transforms/ResetInverterSpec.scala
+++ /dev/null
@@ -1,50 +0,0 @@
-// See LICENSE for license details.
-
-package barstools.tapeout.transforms
-
-import chisel3._
-import chisel3.stage.{ChiselGeneratorAnnotation, ChiselStage}
-import firrtl.{EmittedFirrtlCircuitAnnotation, EmittedFirrtlModuleAnnotation}
-import org.scalatest.freespec.AnyFreeSpec
-import org.scalatest.matchers.should.Matchers
-
-class ExampleModuleNeedsResetInverted extends Module with ResetInverter {
-  val io = IO(new Bundle {
-    val out = Output(UInt(32.W))
-  })
-
-  val r = RegInit(0.U)
-
-  io.out := r
-
-  invert(this)
-}
-
-class ResetNSpec extends AnyFreeSpec with Matchers {
-  "Inverting reset needs to be done throughout module in Chirrtl" in {
-    val chirrtl = (new ChiselStage)
-      .emitChirrtl(new ExampleModuleNeedsResetInverted, Array("--target-dir", "test_run_dir/reset_n_spec"))
-    chirrtl should include("input reset :")
-    (chirrtl should not).include("input reset_n :")
-    (chirrtl should not).include("node reset = not(reset_n)")
-  }
-
-  "Inverting reset needs to be done throughout module when generating firrtl" in {
-    // generate low-firrtl
-    val firrtl = (new ChiselStage)
-      .execute(
-        Array("-X", "low", "--target-dir", "test_run_dir/reset_inverting_spec"),
-        Seq(ChiselGeneratorAnnotation(() => new ExampleModuleNeedsResetInverted))
-      )
-      .collect {
-        case EmittedFirrtlCircuitAnnotation(a) => a
-        case EmittedFirrtlModuleAnnotation(a)  => a
-      }
-      .map(_.value)
-      .mkString("")
-
-    firrtl should include("input reset_n :")
-    firrtl should include("node reset = not(reset_n)")
-    (firrtl should not).include("input reset :")
-  }
-}