[skip ci] address some PR comments

2020-12-07 00:16:05 -08:00
parent 477be36cef
commit d8fd94d57c
2 changed files with 16 additions and 9 deletions
--- a/vlsi/example-design.yml
+++ b/vlsi/example-design.yml
@@ -24,8 +24,7 @@ vlsi.inputs.pin.generate_mode: semi_auto
 # The path name should match the VLSI_TOP makefile parameter if it is set
 par.innovus.floorplan_mode: "auto"
 vlsi.inputs.placement_constraints:
-#  - path: "ChipTop"
-  - path: "Gemmini"
+  - path: "ChipTop"
    type: toplevel
    x: 0
    y: 0