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Don't run DCE && Profit

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John Wright
2019-02-12 10:55:34 -08:00
committed by John Wright
parent 12842cb3a7
commit d861fdd95c
1 changed files with 3 additions and 1 deletions
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4
macros/src/main/scala/MacroCompiler.scala
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@@ -13,6 +13,7 @@ import firrtl.ir._
import firrtl.PrimOps import firrtl.PrimOps
import firrtl.Utils._ import firrtl.Utils._
import firrtl.annotations._ import firrtl.annotations._
import firrtl.transforms.{NoDCEAnnotation}
import firrtl.CompilerUtils.getLoweringTransforms import firrtl.CompilerUtils.getLoweringTransforms
import mdf.macrolib.{PolarizedPort, PortPolarity} import mdf.macrolib.{PolarizedPort, PortPolarity}
import scala.collection.mutable.{ArrayBuffer, HashMap} import scala.collection.mutable.{ArrayBuffer, HashMap}
@@ -764,7 +765,8 @@ object MacroCompiler extends App {
) )
)) ))
) )
val state = CircuitState(circuit, HighForm, annotations) // Append a NoDCEAnnotation to avoid dead code elimination removing the non-parent SRAMs
val state = CircuitState(circuit, HighForm, annotations :+ NoDCEAnnotation)
// Run the compiler. // Run the compiler.
val result = new MacroCompiler().compileAndEmit(state) val result = new MacroCompiler().compileAndEmit(state)