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Merge remote-tracking branch 'origin/dev' into firesim-multiclock

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This commit is contained in:
David Biancolin
2020-03-17 17:49:32 -07:00
parent 958332e1bf ffb9c81ce2
commit d80c2f7c08
125 changed files with 2965 additions and 2280 deletions
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14
generators/firechip/src/test/scala/ScalaTestSuite.scala
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@@ -136,18 +136,18 @@ abstract class FireSimTestSuite(
runSuite("verilator")(FastBlockdevTests)
}
class RocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "DDR3FRFCFSLLC4MB_FireSimRocketChipQuadCoreConfig", "BaseF1Config")
class BoomF1Tests extends FireSimTestSuite("FireSimNoNIC", "DDR3FRFCFSLLC4MB_FireSimBoomConfig", "BaseF1Config")
class RocketNICF1Tests extends FireSimTestSuite("FireSim", "DDR3FRFCFSLLC4MB_FireSimRocketChipConfig", "BaseF1Config") {
class RocketF1Tests extends FireSimTestSuite("FireSim", "DDR3FRFCFSLLC4MB_FireSimQuadRocketConfig", "BaseF1Config")
class BoomF1Tests extends FireSimTestSuite("FireSim", "DDR3FRFCFSLLC4MB_FireSimBoomConfig", "BaseF1Config")
class RocketNICF1Tests extends FireSimTestSuite("FireSim", "WithNIC_DDR3FRFCFSLLC4MB_FireSimRocketConfig", "BaseF1Config") {
runSuite("verilator")(NICLoopbackTests)
}
class RamModelRocketF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimRocketChipDualCoreConfig", "BaseF1Config_MCRams")
class RamModelBoomF1Tests extends FireSimTestSuite("FireSimNoNIC", "FireSimBoomConfig", "BaseF1Config_MCRams")
class RamModelRocketF1Tests extends FireSimTestSuite("FireSim", "FireSimDualRocketConfig", "BaseF1Config_MCRams")
class RamModelBoomF1Tests extends FireSimTestSuite("FireSim", "FireSimBoomConfig", "BaseF1Config_MCRams")
// Multiclock tests
class RocketMulticlockF1Tests extends FireSimTestSuite(
"FireSimNoNIC",
"HalfRateUncore_DDR3FRFCFSLLC4MB_FireSimRocketChipQuadCoreConfig",
"FireSim",
"HalfRateUncore_DDR3FRFCFSLLC4MB_FireSimQuadRocketConfig",
"WithSynthAsserts_BaseF1Config")
abstract class FireSimTraceGenTest(targetConfig: String, platformConfig: String)