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Update docs related to circt

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joey0320
2023-03-11 18:56:36 -08:00
parent 1c1b0effa3
commit d7574084c1
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docs/Tools/FIRRTL.rst
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@@ -7,4 +7,6 @@ Without going into too much detail, FIRRTL is consumed by FIRRTL compilers which
An example of a FIRRTL pass (transformation) is one that optimizes out unused signals.
Once the transformations are done, a Verilog file is emitted and the build process is done.
For more information on please visit their `website <https://chisel-lang.org/firrtl/>`__.
To see how FIRRTL is transformed to Verilog in Chipyard, please visit the :ref:`Customization/Firrtl-Transforms` section.
For more information on FIRRTL, please visit their `website <https://chisel-lang.org/firrtl/>`__.