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[firechip] remove fireboom DUT, remove ExcludeInvalidBoomAssertions mixin

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Abraham Gonzalez
2019-10-07 14:49:15 +00:00
parent 95c20502bf
commit ce2a1a5b5b
4 changed files with 17 additions and 60 deletions
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9
generators/firechip/src/main/scala/TargetMixins.scala
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@@ -14,7 +14,9 @@ import freechips.rocketchip.subsystem._
import freechips.rocketchip.rocket.TracedInstruction
import firesim.bridges.{TraceOutputTop, DeclockedTracedInstruction}
import midas.targetutils.{ExcludeInstanceAsserts, MemModelAnnotation}
import midas.targetutils.MemModelAnnotation
import boom.common.BoomTile
import boom.common.BoomTile
@@ -50,11 +52,6 @@ trait HasTraceIOImp extends LazyModuleImp {
}
}
// Prevent MIDAS from synthesizing assertions in the dummy TLB included in BOOM
trait ExcludeInvalidBoomAssertions extends LazyModuleImp {
ExcludeInstanceAsserts(("NonBlockingDCache", "dtlb"))
}
trait CanHaveMultiCycleRegfileImp {
val outer: utilities.HasBoomAndRocketTiles