Remove sha3 due to no chisel6 compatibility
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@@ -1,22 +0,0 @@
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package chipyard
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import org.chipsalliance.cde.config.{Config}
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import freechips.rocketchip.diplomacy.{AsynchronousCrossing}
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// --------------
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// Rocket+SHA3 Configs
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// These live in a separate file to simplify patching out for the tutorials.
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// --------------
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// DOC include start: Sha3Rocket
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class Sha3RocketConfig extends Config(
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new sha3.WithSha3Accel ++ // add SHA3 rocc accelerator
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig)
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// DOC include end: Sha3Rocket
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class Sha3RocketPrintfConfig extends Config(
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new sha3.WithSha3Printf ++
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new sha3.WithSha3Accel ++ // add SHA3 rocc accelerator
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig)
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@@ -12,10 +12,6 @@ import scala.collection.immutable.ListMap
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// For each of 4 phases, participants will customize and build a
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// small demonstration config.
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// This file is designed to be used after running chipyard/scripts/tutorial-setup.sh,
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// which removes the SHA3 accelerator RTL, and provides participants
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// the experience of integrating external RTL.
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// This file was originally developed for the cancelled ASPLOS-2020
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// Chipyard tutorial. While the configs here work, the corresponding
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// slideware has not yet been created.
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@@ -54,26 +50,6 @@ class TutorialMMIOConfig extends Config(
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new chipyard.config.AbstractConfig
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)
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// Tutorial Phase 3: Integrate a SHA3 RoCC accelerator
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class TutorialSha3Config extends Config(
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// Uncomment this line once you added SHA3 to the build.sbt, and cloned the SHA3 repo
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// new sha3.WithSha3Accel ++
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// For this demonstration we assume the base system is a single-core Rocket, for fast elaboration
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig
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)
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// Tutorial Phase 4: Integrate a Black-box verilog version of the SHA3 RoCC accelerator
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class TutorialSha3BlackBoxConfig extends Config(
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// Uncomment these lines once SHA3 is integrated
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// new sha3.WithSha3BlackBox ++ // Specify we want the Black-box verilog version of Sha3 Ctrl
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// new sha3.WithSha3Accel ++
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// For this demonstration we assume the base system is a single-core Rocket, for fast elaboration
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig
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)
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// Tutorial Phase 5: Map a multicore heterogeneous SoC with multiple cores and memory-mapped accelerators
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class TutorialNoCConfig extends Config(
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Submodule generators/sha3 deleted from 2d38585d64
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