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testing out chipyard tutorial flow

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Nayiri Krzysztofowicz
2023-03-10 16:00:56 -08:00
parent 47f84e97b4
commit c43dcc6aa5
1 changed files with 43 additions and 0 deletions
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43
.github/workflows/chipyard-full-flow.yml vendored
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@@ -107,6 +107,49 @@ jobs:
source env.sh source env.sh
cd sims/verilator cd sims/verilator
make verilog make verilog
- name: VLSI test
run: |
cd ${{ env.REMOTE_WORK_DIR }}
eval "$(conda shell.bash hook)"
# set up all eda tools
cd vlsi
conda create -y --prefix ./osflow python=3.7
conda activate ./osflow
conda install -y -c litex-hub open_pdks.sky130a
conda install -y -c litex-hub yosys
conda install -y -c litex-hub openroad
conda install -y -c litex-hub klayout
conda install -y -c litex-hub magic
conda install -y -c litex-hub netgen
# modify vlsi yaml files
git clone https://github.com/rahulk29/sram22_sky130_macros.git
echo "" >> example-sky130.yml
echo "# tutorial configs" >> example-sky130.yml
echo "technology.sky130.sky130A: $PWD/osflow/share/pdk/sky130A" >> example-sky130.yml
echo "technology.sky130.sram22_sky130_macros: $PWD/sram22_sky130_macros" >> example-sky130.yml
echo "" >> example-openroad.yml
echo "# tutorial configs" >> example-openroad.yml
echo "synthesis.yosys.yosys_bin: $(which yosys)" >> example-openroad.yml
echo "par.openroad.openroad_bin: $(which openroad)" >> example-openroad.yml
echo "par.openroad.klayout_bin: $(which klayout)" >> example-openroad.yml
echo "drc.magic.magic_bin: $(which klayout)" >> example-openroad.yml
echo "lvs.netgen.netgen_bin: $(which klayout)" >> example-openroad.yml
conda deactivate
# normal chipyard setup
cd ${{ env.REMOTE_WORK_DIR }}
source env.sh
# vlsi flow
cd vlsi
export tutorial=sky130-openroad
# TODO: consider setting VLSI_TOP=RocketTile
make buildfile
make syn
make par
cleanup: cleanup:
name: cleanup name: cleanup