SRAM depth to bigint

max synflop depth support
Fix annotation mangling on the harness side
This commit is contained in:
Colin Schmidt
2019-05-02 14:36:57 -07:00
committed by Colin Schmidt
parent e548210ef4
commit c23b2b6f84
19 changed files with 383 additions and 276 deletions

View File

@@ -173,7 +173,7 @@ sealed trait GenerateTopAndHarnessApp extends LazyLogging { this: App =>
protected def executeHarness: Unit = {
optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
customTransforms = harnessTransforms
customTransforms = firrtlOptions.customTransforms ++ harnessTransforms
)
val result = firrtl.Driver.execute(optionsManager)