SRAM depth to bigint
max synflop depth support Fix annotation mangling on the harness side
This commit is contained in:
committed by
Colin Schmidt
parent
e548210ef4
commit
c23b2b6f84
@@ -173,7 +173,7 @@ sealed trait GenerateTopAndHarnessApp extends LazyLogging { this: App =>
|
||||
protected def executeHarness: Unit = {
|
||||
|
||||
optionsManager.firrtlOptions = optionsManager.firrtlOptions.copy(
|
||||
customTransforms = harnessTransforms
|
||||
customTransforms = firrtlOptions.customTransforms ++ harnessTransforms
|
||||
)
|
||||
|
||||
val result = firrtl.Driver.execute(optionsManager)
|
||||
|
||||
Reference in New Issue
Block a user