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Merge remote-tracking branch 'upstream/main' into graphics

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Hansung Kim
2024-01-16 22:39:37 -08:00
parent ce570e0beb b08ada1899
commit bf84580010
171 changed files with 5890 additions and 4232 deletions
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26
build.sbt
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@@ -95,7 +95,7 @@ lazy val chiselSettings = Seq(
// -- Rocket Chip --
lazy val hardfloat = freshProject("hardfloat", rocketChipDir / "hardfloat/hardfloat")
lazy val hardfloat = freshProject("hardfloat", file("generators/hardfloat/hardfloat"))
.settings(chiselSettings)
.dependsOn(midasTargetUtils)
.settings(commonSettings)
@@ -141,17 +141,17 @@ lazy val rocketLibDeps = (rocketchip / Keys.libraryDependencies)
lazy val midasTargetUtils = ProjectRef(firesimDir, "targetutils")
lazy val testchipip = (project in file("generators/testchipip"))
.dependsOn(rocketchip, sifive_blocks)
.dependsOn(rocketchip, rocketchip_blocks)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
lazy val chipyard = (project in file("generators/chipyard"))
.dependsOn(testchipip, rocketchip, boom, hwacha, sifive_blocks, sifive_cache, iocell,
.dependsOn(testchipip, rocketchip, boom, hwacha, rocketchip_blocks, rocketchip_inclusive_cache, iocell,
radiance,
sha3, // On separate line to allow for cleaner tutorial-setup patches
dsptools, rocket_dsp_utils,
gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex, fft_generator,
constellation, mempress, barf, shuttle)
constellation, mempress, barf, shuttle, caliptra_aes)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(
libraryDependencies ++= Seq(
@@ -181,7 +181,7 @@ lazy val fft_generator = (project in file("generators/fft-generator"))
.settings(commonSettings)
lazy val tracegen = (project in file("generators/tracegen"))
.dependsOn(testchipip, rocketchip, sifive_cache, boom)
.dependsOn(testchipip, rocketchip, rocketchip_inclusive_cache, boom)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
@@ -240,6 +240,16 @@ lazy val nvdla = (project in file("generators/nvdla"))
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
lazy val caliptra_aes = (project in file("generators/caliptra-aes-acc"))
.dependsOn(rocketchip, rocc_acc_utils, testchipip, midasTargetUtils)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
lazy val rocc_acc_utils = (project in file("generators/rocc-acc-utils"))
.dependsOn(rocketchip)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
lazy val iocell = Project(id = "iocell", base = file("./tools/barstools/") / "iocell")
.settings(chiselSettings)
.settings(commonSettings)
@@ -275,12 +285,12 @@ lazy val rocket_dsp_utils = freshProject("rocket-dsp-utils", file("./tools/rocke
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
lazy val sifive_blocks = (project in file("generators/sifive-blocks"))
lazy val rocketchip_blocks = (project in file("generators/rocket-chip-blocks"))
.dependsOn(rocketchip)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)
lazy val sifive_cache = (project in file("generators/sifive-cache"))
lazy val rocketchip_inclusive_cache = (project in file("generators/rocket-chip-inclusive-cache"))
.settings(
commonSettings,
Compile / scalaSource := baseDirectory.value / "design/craft")
@@ -300,7 +310,7 @@ lazy val firechip = (project in file("generators/firechip"))
Test / testOptions += Tests.Argument("-oF")
)
lazy val fpga_shells = (project in file("./fpga/fpga-shells"))
.dependsOn(rocketchip, sifive_blocks)
.dependsOn(rocketchip, rocketchip_blocks)
.settings(libraryDependencies ++= rocketLibDeps.value)
.settings(commonSettings)