From bdf207a2897978ab32671cf843e37c215b38d68d Mon Sep 17 00:00:00 2001 From: abejgonzalez Date: Mon, 29 Jan 2024 09:37:52 -0800 Subject: [PATCH] Update dead doc links --- docs/Customization/Boot-Process.rst | 2 +- docs/Generators/Hwacha.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/Customization/Boot-Process.rst b/docs/Customization/Boot-Process.rst index 52ea32c1..9f745b7d 100644 --- a/docs/Customization/Boot-Process.rst +++ b/docs/Customization/Boot-Process.rst @@ -74,6 +74,6 @@ mode, thus starting userspace execution. The easiest way to build a BBL image that boots Linux is to use the FireMarshal tool that lives in the `firesim-software `_ repository. Directions on how to use FireMarshal can be found in the -:fsim_doc:`FireSim documentation `. +:fsim_doc:`FireSim documentation `. Using FireMarshal, you can add custom kernel configurations and userspace software to your workload. diff --git a/docs/Generators/Hwacha.rst b/docs/Generators/Hwacha.rst index 1980cddf..62f4dc06 100644 --- a/docs/Generators/Hwacha.rst +++ b/docs/Generators/Hwacha.rst @@ -5,7 +5,7 @@ The Hwacha project is developing a new vector architecture for future computer s The Hwacha project is inspired by traditional vector machines from the 70s and 80s, and lessons learned from our previous vector-thread architectures such as Scale and Maven The Hwacha project includes the Hwacha microarchitecture generator, as well as the ``XHwacha`` non-standard RISC-V extension. Hwacha does not implement the RISC-V standard vector extension proposal. -For more information on the Hwacha project, please visit the `Hwacha website `__. +For more information on the Hwacha project, please visit the `Hwacha website `__ or search for "Krste Asanovic Hwacha" on Google Scholar for publications. To add the Hwacha vector unit to an SoC, you should add the ``hwacha.DefaultHwachaConfig`` config fragment to the SoC configurations. The Hwacha vector unit uses the RoCC port of a Rocket or BOOM `tile`, and by default connects to the memory system through the `System Bus` (i.e., directly to the L2 cache).