diff --git a/.circleci/config.yml b/.circleci/config.yml index 9c6e9f80..bdd90443 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -12,7 +12,7 @@ parameters: executors: main-env: docker: - - image: ucbbar/chipyard-ci-image:9c650dea + - image: ucbbar/chipyard-ci-image:ab57b7d environment: JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit diff --git a/docs/Tools/Barstools.rst b/docs/Tools/Barstools.rst index f669ba8a..fa4176c4 100644 --- a/docs/Tools/Barstools.rst +++ b/docs/Tools/Barstools.rst @@ -31,6 +31,7 @@ This may include over provisioning (e.g. using a 64x1024 SRAM for a requested 60 Arraying can be done in both width and depth, as well as to solve masking constraints. For example, a 128x2048 array could be composed of four 64x1024 arrays, with two macros in parallel to create two 128x1024 virtual SRAMs which are combinationally muxed to add depth. If this macro requires byte-granularity write masking, but no technology SRAMs support masking, then the tool may choose to use thirty-two 8x1024 arrays in a similar configuration. +You may wish to create a cache of your available SRAM macros either manually, or via a script. A reference script for creating a JSON of your SRAM macros is in the `asap7 technology library folder `__. For information on writing ``.mdf`` files, look at `MDF on github `__ and a brief description in :ref:`Tools/Barstools:SRAM MDF Fields` section. The output of MacroCompiler is a Verilog file containing modules that wrap the technology SRAMs into the specified interface names from the ``.conf``. @@ -73,7 +74,6 @@ Likewise, the ``--force-compile [mem]`` option allows the user to force MacroCom SRAM MDF Fields +++++++++++++++ - Technology SRAM macros described in MDF can be defined at three levels of detail. A single instance can be defined with the `SRAMMacro` format. A group of instances that share the number and type of ports but vary in width and depth can be defined with the `SRAMGroup` format. @@ -82,12 +82,14 @@ A set of groups of SRAMs that can be generated together from a single source lik At the most concrete level the `SRAMMAcro` defines a particular instance of an SRAM. That includes its functional attributes such as its width, depth, and number of access ports. These ports can be read, write, or read and write ports, and the instance can have any number. -In order to correctly map to these functional ports to the physical instance each port is described in a list of sub-structures, in the parent instance's structure. +In order to correctly map these functional ports to the physical instance, each port is described in a list of sub-structures, in the parent instance's structure. Each port is only required to have an address and data field, but can have many other optional fields. -These optional fields include a clock, write enable, read enable, chip enable, mask. +These optional fields include a clock, write enable, read enable, chip enable, mask and its granularity. The mask field can have a different granularity than the data field, e.g. it could be a bit mask or a byte mask. Each field must also specify its polarity, whether it is active high or active low. +The specific JSON file format described above is `here `_. A reference cache of SRAMs from the nangate45 technology library is `available here `_. + In addition to these functional descriptions of the SRAM there are also other fields that specify physical/implementation characteristics. These include the threshold voltage, the mux factor, as well as a list of extra non-functional ports. diff --git a/docs/requirements.txt b/docs/requirements.txt index 4b1565b3..bbd41a71 100644 --- a/docs/requirements.txt +++ b/docs/requirements.txt @@ -2,3 +2,4 @@ Sphinx==1.8.5 Pygments==2.2.0 sphinx-autobuild sphinx_rtd_theme==0.2.5b1 +docutils==0.16 diff --git a/generators/chipyard/src/main/scala/DigitalTop.scala b/generators/chipyard/src/main/scala/DigitalTop.scala index 7fd682d2..3407b4da 100644 --- a/generators/chipyard/src/main/scala/DigitalTop.scala +++ b/generators/chipyard/src/main/scala/DigitalTop.scala @@ -13,6 +13,8 @@ import freechips.rocketchip.devices.tilelink._ // DOC include start: DigitalTop class DigitalTop(implicit p: Parameters) extends ChipyardSystem + with testchipip.CanHavePeripheryCustomBootPin // Enables optional custom boot pin + with testchipip.HasPeripheryBootAddrReg // Use programmable boot address register with testchipip.CanHaveTraceIO // Enables optionally adding trace IO with testchipip.CanHaveBackingScratchpad // Enables optionally adding a backing scratchpad with testchipip.CanHavePeripheryBlockDevice // Enables optionally adding the block device diff --git a/generators/chipyard/src/main/scala/HarnessBinders.scala b/generators/chipyard/src/main/scala/HarnessBinders.scala index da497a54..c1ec2bda 100644 --- a/generators/chipyard/src/main/scala/HarnessBinders.scala +++ b/generators/chipyard/src/main/scala/HarnessBinders.scala @@ -321,3 +321,9 @@ class WithSimDromajoBridge extends ComposeHarnessBinder({ ports.map { p => p.traces.map(tileTrace => SimDromajoBridge(tileTrace)(system.p)) } } }) + +class WithTieOffCustomBootPin extends OverrideHarnessBinder({ + (system: CanHavePeripheryCustomBootPin, th: HasHarnessSignalReferences, ports: Seq[Bool]) => { + ports.foreach(_ := false.B) + } +}) diff --git a/generators/chipyard/src/main/scala/IOBinders.scala b/generators/chipyard/src/main/scala/IOBinders.scala index 5d153834..dd74e960 100644 --- a/generators/chipyard/src/main/scala/IOBinders.scala +++ b/generators/chipyard/src/main/scala/IOBinders.scala @@ -372,6 +372,13 @@ class WithTraceIOPunchthrough extends OverrideIOBinder({ } }) +class WithCustomBootPin extends OverrideIOBinder({ + (system: CanHavePeripheryCustomBootPin) => system.custom_boot_pin.map({ p => + val sys = system.asInstanceOf[BaseSubsystem] + val (port, cells) = IOCell.generateIOFromSignal(p.getWrappedValue, "custom_boot", sys.p(IOCellKey), abstractResetAsAsync = true) + (Seq(port), cells) + }).getOrElse((Nil, Nil)) +}) class WithDontTouchPorts extends OverrideIOBinder({ (system: DontTouch) => system.dontTouchPorts(); (Nil, Nil) diff --git a/generators/chipyard/src/main/scala/config/AbstractConfig.scala b/generators/chipyard/src/main/scala/config/AbstractConfig.scala index da84bd05..6660d159 100644 --- a/generators/chipyard/src/main/scala/config/AbstractConfig.scala +++ b/generators/chipyard/src/main/scala/config/AbstractConfig.scala @@ -21,6 +21,7 @@ class AbstractConfig extends Config( new chipyard.harness.WithSimAXIMMIO ++ // add SimAXIMem for axi4 mmio port, if enabled new chipyard.harness.WithTieOffInterrupts ++ // tie-off interrupt ports, if present new chipyard.harness.WithTieOffL2FBusAXI ++ // tie-off external AXI4 master, if present + new chipyard.harness.WithTieOffCustomBootPin ++ // The IOBinders instantiate ChipTop IOs to match desired digital IOs // IOCells are generated for "Chip-like" IOs, while simulation-only IOs are directly punched through @@ -37,6 +38,7 @@ class AbstractConfig extends Config( new chipyard.iobinders.WithSPIIOCells ++ new chipyard.iobinders.WithTraceIOPunchthrough ++ new chipyard.iobinders.WithExtInterruptIOCells ++ + new chipyard.iobinders.WithCustomBootPin ++ new testchipip.WithDefaultSerialTL ++ // use serialized tilelink port to external serialadapter/harnessRAM new chipyard.config.WithBootROM ++ // use default bootrom diff --git a/generators/testchipip b/generators/testchipip index fd7760e2..c50a0e2e 160000 --- a/generators/testchipip +++ b/generators/testchipip @@ -1 +1 @@ -Subproject commit fd7760e2862661bf6277acfeeb42644797e876d0 +Subproject commit c50a0e2e32d71f4f956c8a616a5ec2f7e31792fb diff --git a/scripts/ubuntu-req.sh b/scripts/ubuntu-req.sh index b33a6649..4889dc48 100755 --- a/scripts/ubuntu-req.sh +++ b/scripts/ubuntu-req.sh @@ -2,8 +2,8 @@ set -ex -sudo apt-get install -y build-essential bison flex -sudo apt-get install -y libgmp-dev libmpfr-dev libmpc-dev zlib1g-dev vim git default-jdk default-jre +sudo apt-get install -y build-essential bison flex software-properties-common +sudo apt-get install -y libgmp-dev libmpfr-dev libmpc-dev zlib1g-dev vim default-jdk default-jre # install sbt: https://www.scala-sbt.org/release/docs/Installing-sbt-on-Linux.html echo "deb https://dl.bintray.com/sbt/debian /" | sudo tee -a /etc/apt/sources.list.d/sbt.list curl -sL "https://keyserver.ubuntu.com/pks/lookup?op=get&search=0x2EE0EA64E40A89B84B2DF73499E82A75642AC823" | sudo apt-key add @@ -12,7 +12,7 @@ sudo apt-get install -y sbt sudo apt-get install -y texinfo gengetopt sudo apt-get install -y libexpat1-dev libusb-dev libncurses5-dev cmake # deps for poky -sudo apt-get install -y python3.6 patch diffstat texi2html texinfo subversion chrpath git wget +sudo apt-get install -y python3.6 patch diffstat texi2html texinfo subversion chrpath wget # deps for qemu sudo apt-get install -y libgtk-3-dev gettext # deps for firemarshal @@ -20,6 +20,10 @@ sudo apt-get install -y python3-pip python3.6-dev rsync libguestfs-tools expat c # install DTC sudo apt-get install -y device-tree-compiler sudo apt-get install -y python +# install git >= 2.17 +sudo add-apt-repository ppa:git-core/ppa -y +sudo apt-get update +sudo apt-get install git -y # install verilator git clone http://git.veripool.org/git/verilator