From bbc8800840b32a4fb53487519a0f9223a198a352 Mon Sep 17 00:00:00 2001
From: chick <chick@qrhino.com>
Date: Tue, 16 Feb 2021 16:29:41 -0800
Subject: [PATCH] Get topAnnos into the mix

---
 .../transforms/GenerateTopAndHarness.scala     | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/tapeout/src/main/scala/barstools/tapeout/transforms/GenerateTopAndHarness.scala b/tapeout/src/main/scala/barstools/tapeout/transforms/GenerateTopAndHarness.scala
index 7a35c4d9..4cb19592 100644
--- a/tapeout/src/main/scala/barstools/tapeout/transforms/GenerateTopAndHarness.scala
+++ b/tapeout/src/main/scala/barstools/tapeout/transforms/GenerateTopAndHarness.scala
@@ -27,12 +27,6 @@ private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogg
     case _ => None
   }.toList
 
-  // order is determined by DependencyAPIMigration
-  val topTransforms = Seq(
-    new ReParentCircuit,
-    new RemoveUnusedModules
-  )
-
   lazy val rootCircuitTarget = CircuitTarget(harnessTop.get)
 
   val topAnnos = synTop.map(st => ReParentCircuitAnnotation(rootCircuitTarget.module(st))) ++
@@ -65,10 +59,14 @@ private class GenerateTopAndHarness(annotations: AnnotationSeq) extends LazyLogg
 
   // Top Generation
   def executeTop(): Seq[ExtModule] = {
-    val annos = new FirrtlStage().execute(Array.empty, annotations ++ Seq(
-      RunFirrtlTransformAnnotation(Dependency[ReParentCircuit]),
-      RunFirrtlTransformAnnotation(Dependency[RemoveUnusedModules])
-    ))
+    val annos = new FirrtlStage().execute(
+      Array.empty,
+      annotations ++ Seq(
+        RunFirrtlTransformAnnotation(Dependency[ReParentCircuit]),
+        RunFirrtlTransformAnnotation(Dependency[RemoveUnusedModules])
+      ) ++
+        topAnnos
+    )
     annos.collectFirst { case FirrtlCircuitAnnotation(circuit) => circuit } match {
       case Some(circuit) =>
         dump(circuit, annos, topFir, topAnnoOut)