Rename implicit clock/reset to referenceclock/reset

fpga/src/main/scala/arty/TestHarness.scala

@@ -21,8 +21,8 @@ class ArtyFPGATestHarness(override implicit val p: Parameters) extends ArtyShell
 
   def success = {require(false, "Success not supported"); false.B }
 
-  def implicitClock = clock_32MHz
+  def referenceClock = clock_32MHz
-  def implicitReset = hReset
+  def referenceReset = hReset
 
   instantiateChipTops()
 }

fpga/src/main/scala/arty100t/Harness.scala

@@ -76,8 +76,8 @@ class Arty100THarness(override implicit val p: Parameters) extends Arty100TShell
 
     harnessSysPLL.plls.foreach(_._1.getReset.get := pllReset)
 
-    def implicitClock = dutClock.in.head._1.clock
+    def referenceClock = dutClock.in.head._1.clock
-    def implicitReset = dutClock.in.head._1.reset
+    def referenceReset = dutClock.in.head._1.reset
     def success = { require(false, "Unused"); false.B }
 
     ddrOverlay.mig.module.clock := harnessBinderClock

fpga/src/main/scala/vc707/TestHarness.scala

@@ -114,12 +114,12 @@ class VC707FPGATestHarnessImp(_outer: VC707FPGATestHarness) extends LazyRawModul
   val hReset = Wire(Reset())
   hReset := _outer.dutClock.in.head._1.reset
 
-  def implicitClock = _outer.dutClock.in.head._1.clock
+  def referenceClock = _outer.dutClock.in.head._1.clock
-  def implicitReset = hReset
+  def referenceReset = hReset
   def success = { require(false, "Unused"); false.B }
 
-  childClock := implicitClock
+  childClock := referenceClock
-  childReset := implicitReset
+  childReset := referenceReset
 
   instantiateChipTops()
 }

fpga/src/main/scala/vcu118/TestHarness.scala

@@ -118,12 +118,12 @@ class VCU118FPGATestHarnessImp(_outer: VCU118FPGATestHarness) extends LazyRawMod
   val hReset = Wire(Reset())
   hReset := _outer.dutClock.in.head._1.reset
 
-  def implicitClock = _outer.dutClock.in.head._1.clock
+  def referenceClock = _outer.dutClock.in.head._1.clock
-  def implicitReset = hReset
+  def referenceReset = hReset
   def success = { require(false, "Unused"); false.B }
 
-  childClock := implicitClock
+  childClock := referenceClock
-  childReset := implicitReset
+  childReset := referenceReset
 
   instantiateChipTops()
 }

generators/chipyard/src/main/scala/harness/HasHarnessInstantiators.scala

@@ -53,8 +53,8 @@ trait HasHarnessInstantiators {
   val harnessBinderReset = Wire(Reset())
 
   // classes which inherit this trait should provide the below definitions
-  def implicitClock: Clock
+  def referenceClock: Clock
-  def implicitReset: Reset
+  def referenceReset: Reset
   def success: Bool
 
   // This can be accessed to get new clocks from the harness
@@ -86,9 +86,9 @@ trait HasHarnessInstantiators {
     val harnessBinderClk = harnessClockInstantiator.requestClockMHz("harnessbinder_clock", getHarnessBinderClockFreqMHz)
     println(s"Harness binder clock is $harnessBinderClockFreq")
     harnessBinderClock := harnessBinderClk
-    harnessBinderReset := implicitReset
+    harnessBinderReset := ResetCatchAndSync(harnessBinderClk, referenceReset.asBool)
 
-    harnessClockInstantiator.instantiateHarnessClocks(implicitClock)
+    harnessClockInstantiator.instantiateHarnessClocks(referenceClock)
 
     lazyDuts
   }

generators/chipyard/src/main/scala/harness/TestHarness.scala

@@ -24,8 +24,8 @@ class TestHarness(implicit val p: Parameters) extends Module with HasHarnessInst
   val success = WireInit(false.B)
   io.success := success
 
-  def implicitClock = clock
+  def referenceClock = clock
-  def implicitReset = reset
+  def referenceReset = reset
 
   instantiateChipTops()
 }

generators/firechip/src/main/scala/FireSim.scala

@@ -72,8 +72,8 @@ class FireSim(implicit val p: Parameters) extends RawModule with HasHarnessInsta
   // In effect, the bridge counts the length of the reset in terms of this clock.
   resetBridge.io.clock := harnessBinderClock
 
-  def implicitClock = false.B.asClock // unused
+  def referenceClock = false.B.asClock // unused
-  def implicitReset = resetBridge.io.reset
+  def referenceReset = resetBridge.io.reset
   def success = { require(false, "success should not be used in Firesim"); false.B }
 
   instantiateChipTops()