rename missing vcs/verilator names | fix ci path

2019-07-16 21:36:36 -07:00
parent 52f959f457
commit b7bc96b6d6
8 changed files with 14 additions and 45 deletions
--- a/docs/Getting-Started/Adding-An-Accelerator-Tutorial.rst
+++ b/docs/Getting-Started/Adding-An-Accelerator-Tutorial.rst
@@ -227,7 +227,7 @@ Now with all of that done, we can go ahead and run our simulation.

 .. code-block:: shell

-    cd verisim
+    cd verilator
    make CONFIG=PWMConfig
    ./simulator-example-PWMConfig ../tests/pwm.riscv