rename missing vcs/verilator names | fix ci path

This commit is contained in:
abejgonzalez
2019-07-16 21:36:36 -07:00
parent 52f959f457
commit b7bc96b6d6
8 changed files with 14 additions and 45 deletions

View File

@@ -253,7 +253,7 @@ jobs:
- riscv-tools-installed-v1-{{ checksum "../riscv-tools.hash" }}
- restore_cache:
keys:
- verilator-installed-v3-{{ checksum "sims/verisim/verilator.mk" }}
- verilator-installed-v3-{{ checksum "sims/verilator/verilator.mk" }}
- run:
name: Building the blockdevrocketchip subproject using Verilator
command: .circleci/do-rtl-build.sh blockdevrocketchip

View File

@@ -39,7 +39,7 @@ else
copy $LOCAL_RISCV_DIR/ $SERVER:$REMOTE_RISCV_DIR
fi
# enter the verisim directory and build the specific config on remote server
# enter the verilator directory and build the specific config on remote server
run "make -C $REMOTE_SIM_DIR clean"
run "export RISCV=\"$TOOLS_DIR\"; export LD_LIBRARY_PATH=\"$LD_LIB_DIR\"; export VERILATOR_ROOT=$REMOTE_VERILATOR_DIR/install/share/verilator; make -C $REMOTE_SIM_DIR VERILATOR_INSTALL_DIR=$REMOTE_VERILATOR_DIR JAVA_ARGS=\"-Xmx8G -Xss8M\" ${mapping[$1]}"
run "rm -rf $REMOTE_CHIPYARD_DIR/project"