wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

ChipTop is now synthesizeable again 🎉

Browse Source
This commit is contained in:
Colin Schmidt
2020-05-27 11:07:41 -07:00
parent 7e0e4555f9
commit b67c58ed15
1 changed files with 1 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
vlsi/Makefile
View File

@@ -178,7 +178,6 @@ ifeq ($(CUSTOM_VLOG), )
GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF)) GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF))
endif endif
#TODO: remove filter-out once PR#572 is merged
$(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB)
mkdir -p $(dir $@) mkdir -p $(dir $@)
echo "sim.inputs:" > $@ echo "sim.inputs:" > $@
@@ -190,7 +189,7 @@ $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB)
echo "synthesis.inputs:" >> $@ echo "synthesis.inputs:" >> $@
echo " top_module: $(VLSI_TOP)" >> $@ echo " top_module: $(VLSI_TOP)" >> $@
echo " input_files:" >> $@ echo " input_files:" >> $@
for x in $(VLSI_RTL) $(filter-out %SimDRAM.v,$(filter-out %.cc,$(shell cat $(VLSI_BB)))); do \ for x in $(VLSI_RTL) $(shell cat $(VLSI_BB)); do \
echo ' - "'$$x'"' >> $@; \ echo ' - "'$$x'"' >> $@; \
done done