From b67c58ed1514317a14728b2520e78a6866263fe4 Mon Sep 17 00:00:00 2001 From: Colin Schmidt Date: Wed, 27 May 2020 11:07:41 -0700 Subject: [PATCH] ChipTop is now synthesizeable again :tada: --- vlsi/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/vlsi/Makefile b/vlsi/Makefile index 66813871..a724f6f1 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -178,7 +178,6 @@ ifeq ($(CUSTOM_VLOG), ) GENERATED_CONFS += $(if $(filter $(tech_name), asap7), , $(SRAM_CONF)) endif -#TODO: remove filter-out once PR#572 is merged $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) mkdir -p $(dir $@) echo "sim.inputs:" > $@ @@ -190,7 +189,7 @@ $(SYN_CONF): $(VLSI_RTL) $(VLSI_BB) echo "synthesis.inputs:" >> $@ echo " top_module: $(VLSI_TOP)" >> $@ echo " input_files:" >> $@ - for x in $(VLSI_RTL) $(filter-out %SimDRAM.v,$(filter-out %.cc,$(shell cat $(VLSI_BB)))); do \ + for x in $(VLSI_RTL) $(shell cat $(VLSI_BB)); do \ echo ' - "'$$x'"' >> $@; \ done