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Have global location to store jar files (avoid issue with sbt assembly caching)

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abejgonzalez
2023-05-26 13:14:06 -07:00
parent aff98d77fe
commit b65d8ef6c6
6 changed files with 8 additions and 6 deletions
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2
sims/vcs/Makefile
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@@ -93,7 +93,7 @@ $(output_dir)/%.fsdb: $(output_dir)/% $(sim_debug)
#########################################################################################
.PHONY: clean clean-sim clean-sim-debug
clean:
rm -rf $(gen_dir) $(sim_prefix)-* ucli.key
rm -rf $(CLASSPATH_CACHE) $(gen_dir) $(sim_prefix)-* ucli.key
clean-sim:
rm -rf $(model_dir) $(build_dir)/vc_hdrs.h $(sim) $(sim).daidir ucli.key

2
sims/verilator/Makefile
View File

@@ -226,7 +226,7 @@ $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug)
#########################################################################################
.PHONY: clean clean-sim clean-sim-debug
clean:
rm -rf $(gen_dir) $(sim_prefix)-*
rm -rf $(CLASSPATH_CACHE) $(gen_dir) $(sim_prefix)-*
clean-sim:
rm -rf $(model_dir) $(sim)

2
sims/xcelium/Makefile
View File

@@ -131,7 +131,7 @@ $(output_dir)/%.vcd: $(output_dir)/% $(sim_debug)
#########################################################################################
.PHONY: clean clean-sim clean-sim-debug
clean:
rm -rf $(gen_dir) $(sim_prefix)-*
rm -rf $(CLASSPATH_CACHE) $(gen_dir) $(sim_prefix)-*
clean-sim:
rm -rf $(model_dir) $(sim) $(sim_workdir) $(sim_run_tcl) ucli.key bpad_*.err sigusrdump.out dramsim*.log