Update deprecated/unused Chisel APIs
These have been deprecated since Chisel 3.6.0. They are being removed in Chisel 6, and will become compile errors at that point.
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@@ -1,7 +1,6 @@
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package chipyard.fpga.arty100t
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package chipyard.fpga.arty100t
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import chisel3._
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import chisel3._
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import chisel3.experimental.{DataMirror, Direction}
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import freechips.rocketchip.jtag.{JTAGIO}
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import freechips.rocketchip.jtag.{JTAGIO}
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import freechips.rocketchip.subsystem.{PeripheryBusKey}
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import freechips.rocketchip.subsystem.{PeripheryBusKey}
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@@ -1,7 +1,7 @@
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package chipyard.fpga.vcu118.bringup
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package chipyard.fpga.vcu118.bringup
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import chisel3._
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import chisel3._
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import chisel3.experimental.{IO, DataMirror}
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import chisel3.reflect.DataMirror
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import freechips.rocketchip.util.{HeterogeneousBag}
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import freechips.rocketchip.util.{HeterogeneousBag}
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import freechips.rocketchip.tilelink.{TLBundle}
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import freechips.rocketchip.tilelink.{TLBundle}
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@@ -6,7 +6,6 @@
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package chipyard
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package chipyard
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import chisel3._
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import chisel3._
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import chisel3.internal.sourceinfo.{SourceInfo}
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import freechips.rocketchip.prci._
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import freechips.rocketchip.prci._
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import org.chipsalliance.cde.config.{Field, Parameters}
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import org.chipsalliance.cde.config.{Field, Parameters}
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@@ -1,7 +1,6 @@
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package chipyard.example
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package chipyard.example
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import chisel3._
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import chisel3._
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import chisel3.experimental.{Analog, BaseModule, DataMirror, Direction}
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import scala.collection.mutable.{ArrayBuffer, LinkedHashMap}
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import scala.collection.mutable.{ArrayBuffer, LinkedHashMap}
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import org.chipsalliance.cde.config.{Field, Parameters}
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import org.chipsalliance.cde.config.{Field, Parameters}
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@@ -2,7 +2,8 @@ package chipyard.harness
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import chisel3._
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import chisel3._
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import chisel3.util._
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import chisel3.util._
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import chisel3.experimental.{Analog, BaseModule, DataMirror, Direction}
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import chisel3.reflect.DataMirror
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import chisel3.experimental.Direction
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import org.chipsalliance.cde.config.{Field, Config, Parameters}
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import org.chipsalliance.cde.config.{Field, Config, Parameters}
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import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImpLike}
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import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImpLike}
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@@ -2,7 +2,6 @@ package chipyard.harness
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import chisel3._
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import chisel3._
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import chisel3.util._
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import chisel3.util._
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import chisel3.experimental.{DataMirror, Direction}
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import org.chipsalliance.cde.config.{Field, Config, Parameters}
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import org.chipsalliance.cde.config.{Field, Config, Parameters}
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import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImpLike}
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import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImpLike}
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