Add help section to makefiles + Reorganize
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60
variables.mk
60
variables.mk
@@ -1,23 +1,45 @@
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#########################################################################################
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# makefile variables shared across multiple makefiles
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# - to use the help text, your Makefile should have a 'help' target that just
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# prints all the HELP_LINES
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#########################################################################################
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HELP_COMPILATION_VARIABLES =
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HELP_PROJECT_VARIABLES = \
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" SUB_PROJECT = use the specific subproject default variables [$(SUB_PROJECT)]" \
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" SBT_PROJECT = the SBT project that you should find the classes/packages in [$(SBT_PROJECT)]" \
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" MODEL = the top level module of the project in Chisel (normally the harness) [$(MODEL)]" \
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" VLOG_MODEL = the top level module of the project in Firrtl/Verilog (normally the harness) [$(VLOG_MODEL)]" \
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" MODEL_PACKAGE = the scala package to find the MODEL in [$(MODEL_PACKAGE)]" \
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" CONFIG = the configuration class to give the parameters for the project [$(CONFIG)]" \
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" CONFIG_PACKAGE = the scala package to find the CONFIG class [$(CONFIG_PACKAGE)]" \
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" GENERATOR_PACKAGE = the scala package to find the Generator class in [$(GENERATOR_PACKAGE)]" \
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" TB = wrapper over the TestHarness needed to simulate in a verilog simulator [$(TB)]" \
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" TOP = top level module of the project (normally the module instantiated by the harness) [$(TOP)]"
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#########################################################################################
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# variables to invoke the generator
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# descriptions:
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# SBT_PROJECT = the SBT project that you should find the classes/packages in
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# MODEL = the top level module of the project in Chisel (normally the harness)
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# VLOG_MODEL = the top level module of the project in Firrtl/Verilog (normally the harness)
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# MODEL_PACKAGE = the scala package to find the MODEL in
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# CONFIG = the configuration class to give the parameters for the project
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# CONFIG_PACKAGE = the scala package to find the CONFIG class
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# GENERATOR_PACKAGE = the scala package to find the Generator class in
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# TB = wrapper over the TestHarness needed to simulate in a verilog simulator
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# TOP = top level module of the project (normally the module instantiated by the harness)
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#
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# project specific:
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# SUB_PROJECT = use the specific subproject default variables
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#########################################################################################
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HELP_SIMULATION_VARIABLES = \
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" BINARY = riscv binary that the simulator will run" \
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" VERBOSE_FLAGS = flags used when doing verbose simulation [$(VERBOSE_FLAGS)]"
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HELP_COMMANDS = \
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" help = display this help"
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HELP_LINES = "" \
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" design specifier variables:" \
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" ---------------------------" \
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$(HELP_PROJECT_VARIABLES) \
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"" \
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" compilation variables:" \
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" ----------------------" \
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$(HELP_COMPILATION_VARIABLES) \
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"" \
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" simulation variables:" \
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" ---------------------" \
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$(HELP_SIMULATION_VARIABLES) \
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"" \
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" some useful general commands:" \
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" -----------------" \
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$(HELP_COMMANDS) \
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""
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#########################################################################################
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# subproject overrides
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@@ -140,15 +162,15 @@ override SCALA_BUILDTOOL_DEPS += $(BLOOP_CONFIG_DIR)/TIMESTAMP
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# 1) the sed removes a leading {file:<path>} that sometimes needs to be
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# provided to SBT when a project but not for bloop.
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# 2) Generally, one could could pass '--' to indicate all remaining arguments are
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# destined for the scala Main, however a bug in Bloop's argument parsing causes the
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# destined for the scala Main, however a bug in Bloop's argument parsing causes the
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# --nailgun-port argument to be lost in this case. Workaround this by prefixing
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# every main-destined argument with "--args"
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define run_scala_main
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cd $(base_dir) && bloop --nailgun-port $(BLOOP_NAILGUN_PORT) run $(shell echo $(1) | sed 's/{.*}//') --main $(2) $(addprefix --args ,$3)
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cd $(base_dir) && bloop --nailgun-port $(BLOOP_NAILGUN_PORT) run $(shell echo $(1) | sed 's/{.*}//') --main $(2) $(addprefix --args ,$3)
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endef
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else
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define run_scala_main
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cd $(base_dir) && $(SBT) "project $(1)" "runMain $(2) $(3)"
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cd $(base_dir) && $(SBT) "project $(1)" "runMain $(2) $(3)"
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endef
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endif
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