Add help section to makefiles + Reorganize
This commit is contained in:
55
common.mk
55
common.mk
@@ -3,22 +3,46 @@
|
||||
#########################################################################################
|
||||
SHELL=/bin/bash
|
||||
|
||||
|
||||
ifndef RISCV
|
||||
$(error RISCV is unset. You must set RISCV yourself, or through the Chipyard auto-generated env file)
|
||||
else
|
||||
$(info Running with RISCV=$(RISCV))
|
||||
endif
|
||||
|
||||
#########################################################################################
|
||||
# specify user-interface variables
|
||||
#########################################################################################
|
||||
HELP_COMPILATION_VARIABLES += \
|
||||
" EXTRA_GENERATOR_REQS = requirements needed for the main generator" \
|
||||
" EXTRA_SIM_CFLAGS = CFLAGS for building simulators" \
|
||||
" EXTRA_SIM_CXXFLAGS = CXXFLAGS for building simulators" \
|
||||
" EXTRA_SIM_LDFLAGS = LDFLAGS for building simulators" \
|
||||
" EXTRA_SIM_SOURCES = simulation sources needed for simulator" \
|
||||
" EXTRA_SIM_REQS = requirements to build the simulator"
|
||||
|
||||
EXTRA_GENERATOR_REQS ?=
|
||||
EXTRA_SIM_CXXFLAGS ?=
|
||||
EXTRA_SIM_CFLAGS ?=
|
||||
EXTRA_SIM_LDFLAGS ?=
|
||||
EXTRA_SIM_SOURCES ?=
|
||||
EXTRA_SIM_REQS ?=
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
HELP_SIMULATION_VARIABLES += \
|
||||
" EXTRA_SIM_FLAGS = runtime simulation flags (passed within +permissive)"
|
||||
|
||||
EXTRA_SIM_FLAGS ?=
|
||||
|
||||
#----------------------------------------------------------------------------
|
||||
HELP_COMMANDS += \
|
||||
" run-binary = run [./$(shell basename $(sim))] and log instructions to file" \
|
||||
" run-binary-fast = run [./$(shell basename $(sim))] and don't log instructions" \
|
||||
" run-binary-debug = run [./$(shell basename $(sim_debug))] and log instructions and waveform to files" \
|
||||
" verilog = generate intermediate verilog files from chisel elaboration and firrtl passes"
|
||||
|
||||
#########################################################################################
|
||||
# extra make variables/rules from subprojects
|
||||
#
|
||||
# EXTRA_GENERATOR_REQS - requirements needed for the main generator
|
||||
# EXTRA_SIM_FLAGS - runtime simulation flags
|
||||
# EXTRA_SIM_CC_FLAGS - cc flags for simulators
|
||||
# EXTRA_SIM_SOURCES - simulation sources needed for simulator
|
||||
# EXTRA_SIM_REQS - requirements to build the simulator
|
||||
# include additional subproject make fragments
|
||||
# see HELP_COMPILATION_VARIABLES
|
||||
#########################################################################################
|
||||
include $(base_dir)/generators/ariane/ariane.mk
|
||||
include $(base_dir)/generators/tracegen/tracegen.mk
|
||||
@@ -55,7 +79,6 @@ $(FIRRTL_TEST_JAR): $(call lookup_srcs,$(CHIPYARD_FIRRTL_DIR),scala)
|
||||
cp -p $(CHIPYARD_FIRRTL_DIR)/utils/bin/firrtl-test.jar $@
|
||||
touch $@
|
||||
|
||||
|
||||
#########################################################################################
|
||||
# Bloop Project Definitions
|
||||
#########################################################################################
|
||||
@@ -139,19 +162,19 @@ verilog: $(sim_vsrcs)
|
||||
#########################################################################################
|
||||
# helper rules to run simulations
|
||||
#########################################################################################
|
||||
.PHONY: run-binary run-binary-fast run-binary-debug run-fast
|
||||
.PHONY: run-binary run-binary-fast
|
||||
.PHONY: run-binary-debug
|
||||
.PHONY: run-fast
|
||||
|
||||
# run normal binary with hardware-logged insn dissassembly
|
||||
run-binary: $(output_dir) $(sim)
|
||||
(set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $(BINARY) </dev/null 2> >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log)
|
||||
|
||||
#########################################################################################
|
||||
# helper rules to run simulator as fast as possible
|
||||
#########################################################################################
|
||||
# run simulator as fast as possible (no insn disassembly)
|
||||
run-binary-fast: $(output_dir) $(sim)
|
||||
(set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $(BINARY) </dev/null | tee $(sim_out_name).log)
|
||||
|
||||
#########################################################################################
|
||||
# helper rules to run simulator with as much debug info as possible
|
||||
#########################################################################################
|
||||
# run simulator with as much debug info as possible
|
||||
run-binary-debug: $(output_dir) $(sim_debug)
|
||||
(set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(WAVEFORM_FLAG) $(PERMISSIVE_OFF) $(BINARY) </dev/null 2> >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log)
|
||||
|
||||
|
||||
Reference in New Issue
Block a user